Abstract: A transistor gate array includes an active transistor region (50a-50n) of transistor gates all oriented in a single direction. Surrounding the active transistor region on all four sides are input/output regions (52a-52d) each containing a row of input/output transistors. All of the I/O devices on all sides of the array are oriented in the same common direction, which is the same direction as the orientation of the active transistor in the active region. This arrangement allows the use of the benefits of high angle ion implantation with fewer ion implant steps. Where some of the transistors are oriented at right angles to others, as in the prior art, four separate directions of high angle ion implantation are required to avoid degradation of electrical properties. With all transistors, including those of the gate array and those of the input/output devices, all oriented in the same direction, only two directions of high angle ion implantation are required.