Abstract: A frequency synthesizer in which good resolution is obtained by a unity increase of the dividing ratio for a controlled proportion of the reference frequency cycles thus giving a fractional dividing ratio. Phase jitter that could be expected to result is eliminated by keeping a running count of the phase error produced by these changes of dividing factor and adding a corresponding voltage to the output of the phase comparator. Smoothing of the comparator output is thus no problem and the loop filter does not therefore have to have a narrow bandwidth. The loop bandwidth must be an order lower than the reference frequency and since now the loop bandwidth can be increased so can the reference frequency. The fractional dividing ratio ensures that the resolution is not limited by the reference frequency and thus the previously incompatible combination of fine resolution, wide loop bandwidth (for low phase noise) and a relatively unrestricted reference frequency is achieved.