Abstract: A frequency tracking arrangement in which a frequency tracking circuit utilizes a continuously variable analogue first order all-pass filter circuit as a controllable phase-shift element in a closed-loop system which produces a control signal to control the phase shift circuit to introduce a 90.degree. phase shift of a received reference frequency signal when the circuit is tracking that reference frequency. The control signal may then be utilized to slave the cut-off frequency of a filter and/or the delay time introduced by a delay line.

Abstract: Active filter circuit 1 consists of five filter stages 70-74 cascoded between a voltage supply and ground potential. The circuit has two major current paths, the first through the collector-emitter paths at transistors 31, 33, 35, 37 and 39, the second through transistors 32, 34, 36, 38 and 40. Each major current path is driven by a current source 61, 62. In operation, a differential input signal is applied to the base electrodes of transistors 31, 32 and a differential output signal is taken from the emitters of transistors 39, 40. The transistors 33, 34 of stage 71 have their collector and base electrodes cross-coupled. Transistors 35-40 of stages 72-74 are connected in the same manner. In another embodiment (FIG. 3, not shown) a cut-off frequency is varied under control of controllable current sources.

Abstract: A filter circuit comprises three stages 260, 270, 280, each having a differential input and a differential output. The output of stage 260 serves as the input of stage 270 and the output of stage 270 serves as the input of stage 280 respectively. Stage 260 comprises two transistor pairs 201, 202 and 203, 204. An input signal is applied to the base electrodes of transistors 201, 204 which causes a current change in their opposite transistor 202, 203. Transistors 202, 203 have their respective base and collector electrodes connected together. The collector electrodes of transistors 202, 203 constitute the output of stage 260. Stages 270 and 280 have essentially the same structure as stage 260. The arrangement offers high frequency capabilities from a low supply voltage. In another embodiment, a cut-off frequency is varied under control of controllable current sources.

Abstract: An equaliser circuit arrangement for compensating for the frequency-dependent characteristics of a transmission line such as an untwisted pair, for lines of lengths up to, say, 125 meters and at data rates up to, say, 155MBits/sec., in which signals from the transmission line are applied by way of a unity gain path and a frequency-selective path including a first wide-band amplifier of variable gain to a summing node. The signals at the summing node may be further amplified by a second wide-band variable gain amplifier using gain control signals derived for the first amplifier.