Patents by Inventor Nicholas Shaylor
Nicholas Shaylor has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7246347Abstract: One embodiment of the present invention provides a system that facilitates loading classes into non-volatile memory. During the loading process, the system first loads class definitions into volatile memory, wherein the class definitions contain metadata for classes currently being loaded into non-volatile memory, as well as metadata for classes that are already loaded into non-volatile memory. Next, after the class definitions are loaded into volatile memory, the system loads method code for the classes into non-volatile memory. During this process, the system uses the class definitions to resolve linkages in the method code so that the method code is ready for execution in non-volatile memory.Type: GrantFiled: June 24, 2003Date of Patent: July 17, 2007Assignee: Sun Microsystems, IncInventors: Nicholas Shaylor, Douglas N. Simon
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Publication number: 20070156729Abstract: A data structure is disclosed. The data structure includes a data descriptor record. In turn, the data descriptor record includes a type field, a base address field, an offset field, wherein the, and a length field. The type field may be configured, for example, to indicate a data structure type. The data structure type may be configured to assume a values indicating one of a contiguous buffer, a scatter-gather list and a linked list structure, among other such data structures. The base address field may be configured, for example, to store a base address, with the base address being a starting address of a secondary data structure associated with the data descriptor record. The offset field may be configured, for example, to indicate a starting address of data within a secondary data structure pointed to by a base address stored in the base address field.Type: ApplicationFiled: February 28, 2007Publication date: July 5, 2007Inventor: Nicholas Shaylor
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Patent number: 7228532Abstract: One embodiment of the present invention provides a system that facilitates code verification and garbage collection in a platform-independent virtual machine. The system operates by first receiving a code module written in a platform-independent language. Next, the system examines the code module to locate calls to program methods within the code module. The system then transforms the code module so that all operands remaining on the evaluation stack only relate to the called method when the method is called, thereby simplifying verification and garbage collection of the code module.Type: GrantFiled: June 24, 2003Date of Patent: June 5, 2007Assignee: Sun Microsystems, Inc.Inventors: Nicholas Shaylor, Douglas N. Simon
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Patent number: 7194569Abstract: A data structure is disclosed. The data structure includes a data descriptor record. In turn, the data descriptor record includes a type field, a base address field, an offset field, wherein the, and a length field. The type field may be configured, for example, to indicate a data structure type. The data structure type may be configured to assume a values indicating one of a contiguous buffer, a scatter-gather list and a linked list structure, among other such data structures. The base address field may be configured, for example, to store a base address, with the base address being a starting address of a secondary data structure associated with the data descriptor record. The offset field may be configured, for example, to indicate a starting address of data within a secondary data structure pointed to by a base address stored in the base address field.Type: GrantFiled: March 19, 2004Date of Patent: March 20, 2007Assignee: Sun Microsystems, Inc.Inventor: Nicholas Shaylor
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Patent number: 7162712Abstract: One embodiment of the present invention provides a system for implementing a string object defined in a programming language. Upon receiving characters to be embedded in the string object, the system allocates space for the string object that includes a header, which is appended to a character array of the string object. Next, the system copies the characters into the character array of the string object. The system also initializes the header by initializing a class pointer in the header to point to a class for the string object, and by initializing a length field in the header to specify a length for the string object. In this way, the string object remains compatible with previous implementations of the string object that use a character array that is separate from the string object.Type: GrantFiled: January 24, 2003Date of Patent: January 9, 2007Assignee: Sun Microsystems, Inc.Inventors: Nicholas Shaylor, Douglas N. Simon
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Patent number: 6996745Abstract: A symmetric multiprocessor (SMP) system includes a plurality of central processing units (CPUs). Processing by a central processing unit (CPU) is safely halted i.e., a CPU is shut down, using a technique that assures that the CPU is executing an idle thread when the CPU is shut down. Halting the CPU safely means (a) that the CPU cannot be executing a thread other than the idle thread, and (b) that state information for a thread does not reside only within the CPU. The first limitation assures that the CPU cannot be executing a time critical thread that fails if the execution of the time critical thread has to move to another CPU.Type: GrantFiled: September 27, 2001Date of Patent: February 7, 2006Assignee: Sun Microsystems, Inc.Inventor: Nicholas Shaylor
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Patent number: 6865579Abstract: A data structure is disclosed. Such a data structure includes a thread control block and a message. The thread control block is described by a first data structure and the message is described by a second data structure. Additionally, the first data structure includes the second data structure. Thus, a data structure according to the present invention combines a thread control block structure and a message structure to provide the various benefits described herein. The first data structure may be configured, for example, to store information used to control execution of a thread, with the second data structure configured to store a message.Type: GrantFiled: August 28, 2000Date of Patent: March 8, 2005Assignee: Sun Microsystems, Inc.Inventor: Nicholas Shaylor
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Patent number: 6832266Abstract: An operating system architecture is disclosed. The operating system architecture is configured to provide a user space and a kernel space. The operating system architecture comprises a number of tasks, a message, and a microkernel. The tasks are executed in the user space, while the microkernel is executed in the kernel space. The microkernel supports an application programming interface (API) that is configured to support a limited number of directives, the limited number of directives being substantially fewer in number than a number of directives supported by an application programming interface of a traditional operating system. The microkernel is configured to pass the message from a first one of the tasks to a second one of the tasks by virtue of the application programming interface being configured to support message-passing directives.Type: GrantFiled: February 7, 2000Date of Patent: December 14, 2004Assignee: Sun Microsystems, Inc.Inventor: Nicholas Shaylor
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Patent number: 6760907Abstract: A method, system and apparatus for generating and optimizing native code in a runtime compiler from a group of bytecodes presented to the compiler. The compiler accesses information that indicates a likelihood that a class will be a particular type when accessed by the running program. Using the accessed information, the compiler selects a code generation method from a plurality of code generation methods. A code generator generates optimized native code according to the selected code generation method and stores the optimized native code in a code cache for reuse.Type: GrantFiled: June 30, 1998Date of Patent: July 6, 2004Assignee: Sun Microsystems, Inc.Inventor: Nicholas Shaylor
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Publication number: 20040117793Abstract: A method of executing a thread is disclosed. The method includes indicating that the thread is one of a pre-emptible thread and a non-pre-emptible thread.Type: ApplicationFiled: December 17, 2002Publication date: June 17, 2004Applicant: Sun Microsystems, Inc.Inventor: Nicholas Shaylor
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Patent number: 6728722Abstract: A data structure is disclosed. The data structure includes a data descriptor record. In turn, the data descriptor record includes a type field, a base address field, an offset field, wherein the, and a length field. The type field may be configured, for example, to indicate a data structure type. The data structure type may be configured to assume a values indicating one of a contiguous buffer, a scatter-gather list and a linked list structure, among other such data structures. The base address field may be configured, for example, to store a base address, with the base address being a starting address of a secondary data structure associated with the data descriptor record. The offset field may be configured, for example, to indicate a starting address of data within a secondary data structure pointed to by a base address stored in the base address field.Type: GrantFiled: August 28, 2000Date of Patent: April 27, 2004Assignee: Sun Microsystems, Inc.Inventor: Nicholas Shaylor
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Publication number: 20040006583Abstract: One embodiment of the present invention provides a system that facilitates converting a synchronized method into a non-synchronized method. During operation, the system receives a code module that includes a synchronized method. This synchronized method automatically performs a lock operation before executing its method body and automatically performs an unlock operation after executing its method body, whereby at most one thread at a time can execute the method body. Next, the system changes the synchronized method into a non-synchronized method that does not automatically perform lock and unlock operations. The system also inserts an explicit lock instruction at the beginning of the method body, and inserts an explicit unlock instruction at the end of the method body.Type: ApplicationFiled: June 6, 2003Publication date: January 8, 2004Inventors: Nicholas Shaylor, Douglas N. Simon
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Publication number: 20040001010Abstract: One embodiment of the present invention provides a system for implementing a string object defined in a programming language. Upon receiving characters to be embedded in the string object, the system allocates space for the string object that includes a header, which is appended to a character array of the string object. Next, the system copies the characters into the character array of the string object. The system also initializes the header by initializing a class pointer in the header to point to a class for the string object, and by initializing a length field in the header to specify a length for the string object. In this way, the string object remains compatible with previous implementations of the string object that use a character array that is separate from the string object.Type: ApplicationFiled: January 24, 2003Publication date: January 1, 2004Inventors: Nicholas Shaylor, Douglas N. Simon
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Publication number: 20020108025Abstract: A method for managing memory in a computing system having a defined virtual address space and a physical memory. The virtual address space is partitioned into an upper portion and a lower portion. All of the physical memory is mapped to the lower portion of the virtual address space. A task comprising code static data, and heap data structures are executed by copying the code data structures of the task to the physical memory. A contiguous region of physical memory is allocated to the task's data structures. The contiguous region of physical memory is mapped into a segment of the upper portion of the virtual address space. The task's data structures can be expanded by mapping additional physical address space to the task's upper segment or by moving the entire data structures to a second contiguous region of physical memory.Type: ApplicationFiled: October 21, 1998Publication date: August 8, 2002Inventor: NICHOLAS SHAYLOR
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Patent number: 5600816Abstract: A cache system is described which is adapted for staging data between host memory and a disk array comprising a plurality of disk storage devices plus associated controller unit, data being storable across the disks of the array in the form of strides, each stride comprising a multi-sector `stripe` of data on each of two or more devices of the array and an associated multi-sector parity block on a further array device. The cache system includes means for linking the data and associated parity making up a stride within the cache as a cache data unit which is manipulated in the cache as a single entity. References from the host to data held within the cache causes the referenced cache unit to move to the head of a list of cache units.Type: GrantFiled: December 21, 1993Date of Patent: February 4, 1997Assignee: International Business Machines CorporationInventors: Clive S. Oldfield, Nicholas Shaylor
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Patent number: 5497476Abstract: A method and apparatus that transfers data between system memory which is arranged in pages and an attached storage system. In such a paged memory, data which crosses pages having contiguous virtual addresses may map to data which crosses discontiguous physical pages. Scatter-gather is advantageously employed in such a system in order to achieve the transfer data directly between, memory and storage usually by Direct Memory Access (DMA). A secondary storage device which supports scatter-gather usually includes hardware which will perform the necessary calculations to transfer the data to and from the correct locations in physical memory.Type: GrantFiled: September 21, 1993Date of Patent: March 5, 1996Assignee: International Business Machines CorporationInventors: Clive S. Oldfield, Nicholas Shaylor