Patents by Inventor Nickole Gagne
Nickole Gagne has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9391063Abstract: An apparatus comprises an integrated circuit (IC) comprising an external IC connection, an IC substrate connection, a voltage clamp circuit and an under voltage circuit. The voltage of the IC substrate connection is set to a first voltage when a voltage of the external connection of the IC is within a normal operating voltage range. The voltage clamp circuit is configured to clamp the voltage supply of one or more circuits internal to the IC to within a normal operating voltage range when the voltage of the external IC connection exceeds the normal operating voltage range. The under voltage circuit is communicatively coupled to the clamp circuit and configured to set the voltage of the substrate to a second voltage when the voltage at the external IC connection of the IC is less than zero volts.Type: GrantFiled: May 24, 2011Date of Patent: July 12, 2016Assignee: Fairchild Semiconductor CorporationInventors: Nickole Gagne, Gregory A. Maher, Christian Klein
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Patent number: 9148026Abstract: Method and apparatus, among other things, are provided for detecting a charger type. In an example, a method to classify a potential charger coupled to a port of an electronic device can include detecting the potential charger coupled to a USB-compatible port of the electronic device, applying a pull-down current to first and second data lines of the USB-compatible port to provide a first test voltage on each of the first and second data lines, and executing a primary detection process of a USB Battery Charging 1.2 Compliance Plan if the first test voltage on each of the first and second data lines is not between a first threshold and a second threshold using the pull-down current.Type: GrantFiled: September 26, 2012Date of Patent: September 29, 2015Assignee: Fairchild Semiconductor CorporationInventors: Nickole Gagne, Oscar W. Freitas, Christian Klein, Tyler Daigle, Derek Richardson
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Patent number: 8981843Abstract: This document discusses, among other things, a control circuit, such as a translator circuit, configured to reduce voltage stress of first and second transistors when a first voltage received by the first transistor exceeds a voltage rating of at least one of the first or second transistors.Type: GrantFiled: March 11, 2013Date of Patent: March 17, 2015Assignee: Fairchild Semiconductor CorporationInventors: Nickole Gagne, Kenneth P. Snowdon
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Patent number: 8975923Abstract: Apparatus and methods for a protective multiplexer, among other things, are provided. In an example, a protective multiplexer circuit can include a first switch that in a first state can be configured to couple an input of a power supply to at least one of first or second signal nodes of a passgate when a first voltage of the at least one of the first or second signal nodes is below a first limit voltage.Type: GrantFiled: August 20, 2012Date of Patent: March 10, 2015Assignee: Fairchild Semiconductor CorporationInventors: Nickole Gagne, Kenneth P. Snowdon
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Patent number: 8791679Abstract: A power supply system is provided that provides voltage clamping capabilities to provide over voltage protection to circuit elements and circuit systems. The power supply includes isolation mechanisms that generate a regulated power supply that is independent of an input power source. Voltage addition/multiplication techniques may be utilized to generate a reference voltage, from the regulated power supply, that is capable of setting a maximum voltage on a clamped power supply. The power supply system may operate without input from other circuits/systems associated with an integrated circuit.Type: GrantFiled: August 15, 2011Date of Patent: July 29, 2014Assignee: Fairchild Semiconductor CorporationInventors: Nickole Gagne, Gregory Maher
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Publication number: 20140193003Abstract: This document discusses, among other things, a switch multiplexer having a common connector, the switch multiplexer including a first switch configured to receive a first signal at or above a ground (GND) reference and a second switch configured to receive a second signal that swings positive and negative about ground. The switch multiplexer includes a negative charge pump configured to bias the first switch with a negative charge pump voltage lower than the most negative voltage swing of the second signal when the second switch is enabled, and to bias the first switch with GND when the first switch is enabled.Type: ApplicationFiled: October 14, 2013Publication date: July 10, 2014Applicant: Fairchild Semiconductor CorporationInventor: Nickole Gagne
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Patent number: 8729950Abstract: This document discloses, among other things, a voltage clamp circuit where an output voltage equals an input voltage for at least a portion of a first range of input voltages, and where the output voltage is less than the input voltage for at least a portion of a second range of input voltages.Type: GrantFiled: May 30, 2012Date of Patent: May 20, 2014Assignee: Fairchild Semiconductor CorporationInventors: Nickole Gagne, Steven Macaluso, Jani Kauppinen
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Patent number: 8710900Abstract: In one general aspect, an apparatus including a first voltage rail, and a second voltage rail. The apparatus includes a first P-type metal-oxide-semiconductor field effect transistor (MOSFET) PMOS device between the first voltage rail and the second voltage rail where the first PMOS device is configured to electrically couple the first voltage rail to the second voltage rail in response to the first PMOS device being activated. The apparatus can also include a second PMOS device configured to provide a charge pump voltage produced by a charge pump device to the second voltage rail in response to the second PMOS device being activated and the first PMOS device being deactivated. The apparatus can also include a pass gate, and a driver circuit coupled to the pass gate and configured to operate based on a voltage of the second voltage rail.Type: GrantFiled: March 22, 2012Date of Patent: April 29, 2014Assignee: Fairchild Semiconductor CorporationInventors: Nickole Gagne, Kenneth P. Snowdon
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Publication number: 20140049861Abstract: Apparatus and methods for a protective multiplexer, among other things, are provided. In an example, a protective multiplexer circuit can include a first switch that in a first state can be configured to couple an input of a power supply to at least one of first or second signal nodes of a passgate when a first voltage of the at least one of the first or second signal nodes is below a first limit voltage.Type: ApplicationFiled: August 20, 2012Publication date: February 20, 2014Applicant: Fairchild Semiconductor CorporationInventors: Nickole Gagne, Kenneth P. Snowdon
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Patent number: 8624663Abstract: In one general aspect, an apparatus can include a complementary switch circuit including a first portion and a second portion, and a first driver circuit coupled to the first portion of the complementary switch circuit. The apparatus can include a positive charge pump device coupled to the first driver, and a second driver circuit coupled to the second portion of the complementary switch circuit. The apparatus can also include a negative charge pump device coupled to the second driver circuit.Type: GrantFiled: March 2, 2012Date of Patent: January 7, 2014Assignee: Fairchild Semiconductor CorporationInventors: Nickole Gagne, Kenneth P Snowdon
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Publication number: 20130321055Abstract: This document discloses, among other things, a voltage clamp circuit where an output voltage equals an input voltage for at least a portion of a first range of input voltages, and where the output voltage is less than the input voltage for at least a portion of a second range of input voltages.Type: ApplicationFiled: May 30, 2012Publication date: December 5, 2013Applicant: Fairchild Semiconductor CorporationInventors: Nickole Gagne, Steven Macaluso, Jani Kauppinen
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Publication number: 20130321070Abstract: This document discusses, among other things, a control circuit, such as a translator circuit, configured to reduce voltage stress of first and second transistors when a first voltage received by the first transistor exceeds a voltage rating of at least one of the first or second transistors.Type: ApplicationFiled: March 11, 2013Publication date: December 5, 2013Applicant: Fairchild Semiconductor CorporationInventors: Nickole Gagne, Kenneth P. Snowdon
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Patent number: 8564918Abstract: This document discusses methods and apparatus for preventing or reducing sub-threshold pass gate leakage. In an example, an apparatus can include a pass gate configured to electrically couple a first node with a second node in a first state and to electrically isolate the first node from the second node in a second state, control logic configured to control the pass gate, wherein the control logic includes a supply rail, and an over-voltage circuit configured to compare voltages received at a plurality of input nodes and to couple an output to an input node a highest voltage. In an example, the output of over-voltage circuit can be selectively coupled to the supply rail.Type: GrantFiled: February 16, 2011Date of Patent: October 22, 2013Assignee: Fairchild Semiconductor CorporationInventors: Nickole Gagne, Kenneth P. Snowdon
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Publication number: 20130249621Abstract: In one general aspect, an apparatus including a first voltage rail, and a second voltage rail. The apparatus includes a first P-type metal-oxide-semiconductor field effect transistor (MOSFET) PMOS device between the first voltage rail and the second voltage rail where the first PMOS device is configured to electrically couple the first voltage rail to the second voltage rail in response to the first PMOS device being activated. The apparatus can also include a second PMOS device configured to provide a charge pump voltage produced by a charge pump device to the second voltage rail in response to the second PMOS device being activated and the first PMOS device being deactivated. The apparatus can also include a pass gate, and a driver circuit coupled to the pass gate and configured to operate based on a voltage of the second voltage rail.Type: ApplicationFiled: March 22, 2012Publication date: September 26, 2013Inventors: Nickole Gagne, Kenneth P. Snowdon
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Patent number: 8536928Abstract: An integrated circuit (IC) comprises a transistor circuit and a voltage generator circuit. The voltage generator circuit is configured to generate an activation voltage for the transistor circuit using an output voltage at an output of the transistor circuit, and maintain a gate-source voltage (VGS) of the transistor circuit at a substantially constant voltage above the output voltage when a magnitude of the generated activation voltage is less than a device voltage rating of the IC and when the magnitude of the generated activation voltage meets or exceeds the device voltage rating of the IC.Type: GrantFiled: May 25, 2012Date of Patent: September 17, 2013Assignee: Fairchild Semiconductor CorporationInventors: Nickole Gagne, Jouni Mika Kalervo Vuorinen
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Publication number: 20130229225Abstract: In one general aspect, an apparatus can include a complementary switch circuit including a first portion and a second portion, and a first driver circuit coupled to the first portion of the complementary switch circuit. The apparatus can include a positive charge pump device coupled to the first driver, and a second driver circuit coupled to the second portion of the complementary switch circuit. The apparatus can also include a negative charge pump device coupled to the second driver circuit.Type: ApplicationFiled: March 2, 2012Publication date: September 5, 2013Inventors: Nickole Gagne, Kenneth P. Snowdon
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Publication number: 20130169255Abstract: This document discusses, among other things, apparatus and methods for providing a power-on-reset signal. An example apparatus can include a regulator configured to receive a supply voltage and to provide a regulated voltage at an output, and a power-on-reset (POR) circuit including a POR comparator. The POR circuit can be configured to provide an indication that the regulated voltage is below a threshold level using an output of the POR comparator and to disable the POR comparator when the regulated voltage is above the threshold level.Type: ApplicationFiled: December 30, 2011Publication date: July 4, 2013Inventors: Tyler Daigle, Kenneth P. Snowdon, Nickole Gagne, Julie Lynn Stultz
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Publication number: 20130082644Abstract: Method and apparatus, among other things, are provided for detecting a charger type. In an example, a method to classify a potential charger coupled to a port of an electronic device can include detecting the potential charger coupled to a USB-compatible port of the electronic device, applying a pull-down current to first and second data lines of the USB-compatible port to provide a first test voltage on each of the first and second data lines, and executing a primary detection process of a USB Battery Charging 1.2 Compliance Plan if the first test voltage on each of the first and second data lines is not between a first threshold and a second threshold using the pull-down current.Type: ApplicationFiled: September 26, 2012Publication date: April 4, 2013Applicant: Fairchild Semiconductor CorporationInventors: Nickole Gagne, Oscar W. Freitas, Christian Klein, Tyler Daigle, Derek Richardson
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Publication number: 20120320481Abstract: Devices, systems and methods are provided for protecting electronic circuitry from voltage transients including undervoltage transients in a supply voltage. The device may include a first low voltage isolated transistor coupled in forward bias with respect to a power supply and a second low voltage isolated transistor coupled in series with the first low voltage isolated transistor and in reverse bias with respect to the power supply voltage. The device may further include a resistor coupled between a gate of the first low voltage isolated transistor and the power supply, the resistor configured to limit current flow to the gate of the first low voltage isolated transistor during an overvoltage event.Type: ApplicationFiled: June 5, 2012Publication date: December 20, 2012Applicant: FAIRCHILD SEMICONDUCTOR CORPORATIONInventors: Nickole Gagne, Steve Macaluso, Tyler Daigle, Taeghyun Kang
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Patent number: 8330523Abstract: This document discusses, among other things, a compensation circuit configured to modulate a control voltage of a switch over a range of ambient temperatures during a conduction state of the switch to maintain a specified resistance between first and second nodes of the switch. The compensation circuit can include a temperature-insensitive resistor configured to provide a sense current, a current mirror configured to provide a mirror current using the sense current, and a temperature-sensitive resistor configured to provide the control voltage using the mirror current.Type: GrantFiled: November 23, 2010Date of Patent: December 11, 2012Assignee: Fairchild Semiconductor CorporationInventors: Nickole Gagne, Julie Lynn Stultz, Steven Macaluso