Patents by Inventor Nicolas A. Papanicolaou
Nicolas A. Papanicolaou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8652959Abstract: A complementary metal oxide semiconductor (CMOS) device in which a single InxGa1-xSb quantum well serves as both an n-channel and a p-channel in the same device and a method for making the same. The InxGa1-xSb layer is part of a heterostructure that includes a Te-delta doped AlyGa1-ySb layer above the InxGa1-xSb layer on a portion of the structure. The portion of the structure without the Te-delta doped AlyGa1-ySb barrier layer can be fabricated into a p-FET by the use of appropriate source, gate, and drain terminals, and the portion of the structure retaining the Te-delta doped AlyGa1-ySb layer can be fabricated into an n-FET so that the structure forms a CMOS device, wherein the single InxGa1-xSb quantum well serves as the transport channel for both the n-FET portion and the p-FET portion of the heterostructure.Type: GrantFiled: February 1, 2013Date of Patent: February 18, 2014Assignee: The United States of America, as represented by the Secretary of the NavyInventors: Brian R. Bennett, John Bradley Boos, Mario Ancona, James G. Champlain, Nicolas A. Papanicolaou
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Publication number: 20130149845Abstract: A complementary metal oxide semiconductor (CMOS) device in which a single InxGa1-xSb quantum well serves as both an n-channel and a p-channel in the same device and a method for making the same. The InxGa1-xSb layer is part of a heterostructure that includes a Te-delta doped AlyGa1-ySb layer above the InxGa1-xSb layer on a portion of the structure. The portion of the structure without the Te-delta doped AlyGa1-ySb barrier layer can be fabricated into a p-FET by the use of appropriate source, gate, and drain terminals, and the portion of the structure retaining the Te-delta doped AlyGa1-ySb layer can be fabricated into an n-FET so that the structure forms a CMOS device, wherein the single InxGa1-xSb quantum well serves as the transport channel for both the n-FET portion and the p-FET portion of the heterostructure.Type: ApplicationFiled: February 1, 2013Publication date: June 13, 2013Applicant: The Government of the United States of America, as represented by the Secretary of the NavyInventors: Brian R. Bennett, John Bradley Boos, Mario Ancona, James G. Champlain, Nicolas A. Papanicolaou
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Patent number: 8459123Abstract: Micro-opto-mechanical chemical sensors and methods for simultaneously detecting and discriminating between a variety of vapor-phase analytes. One embodiment of the sensor is a photonic microharp chemical sensor with an array of closely spaced microbridges, each differing slightly in length and coated with a different sorbent polymer. The microbridges can be excited photothermally, and the microbridges can be optically interrogated using microcavity interferometry. Other actuation methods include piezoelectric, piezoresistive, electrothermal, and magnetic. Other read-out techniques include using a lever arm and other interferometric techniques.Type: GrantFiled: September 29, 2009Date of Patent: June 11, 2013Assignee: The United States of America, as represented by the Secretary of the NavyInventors: Todd H. Stievater, William S Rabinovich, Nicolas A Papanicolaou, Robert Bass, Jennifer L Stepnowski, R Andrew McGill
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Patent number: 8461664Abstract: A complementary metal oxide semiconductor (CMOS) device in which a single InxGa1-xSb quantum well serves as both an n-channel and a p-channel in the same device and a method for making the same. The InxGa1-xSb layer is part of a heterostructure that includes a Te-delta doped AlyGa1-ySb layer above the InxGa1-xSb layer on a portion of the structure. The portion of the structure without the Te-delta doped AlyGa1-ySb barrier layer can be fabricated into a p-FET by the use of appropriate source, gate, and drain terminals, and the portion of the structure retaining the Te-delta doped AlyGa1-ySb layer can be fabricated into an n-FET so that the structure forms a CMOS device, wherein the single InxGa1-xSb quantum well serves as the transport channel for both the n-FET portion and the p-FET portion of the heterostructure.Type: GrantFiled: May 25, 2011Date of Patent: June 11, 2013Assignee: The United States of America, as represented by the Secretary of the NavyInventors: Brian R. Bennett, John Bradley Boos, Mario Ancona, James G. Champlain, Nicolas A Papanicolaou
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Publication number: 20110297916Abstract: A complementary metal oxide semiconductor (CMOS) device in which a single InxGa1-xSb quantum well serves as both an n-channel and a p-channel in the same device and a method for making the same. The InxGa1-xSb layer is part of a heterostructure that includes a Te-delta doped AlyGa1-ySb layer above the InxGa1-xSb layer on a portion of the structure. The portion of the structure without the Te-delta doped AlyGa1-ySb barrier layer can be fabricated into a p-FET by the use of appropriate source, gate, and drain terminals, and the portion of the structure retaining the Te-delta doped AlyGa1-ySb layer can be fabricated into an n-FET so that the structure forms a CMOS device, wherein the single InxGa1-xSb quantum well serves as the transport channel for both the n-FET portion and the p-FET portion of the heterostructure.Type: ApplicationFiled: May 25, 2011Publication date: December 8, 2011Applicant: The Government of the United States of America, as represented by the Secretary of the NavyInventors: Brian R. Bennett, John Bradley Boos, Mario Ancona, James G. Champlain, Nicolas A. Papanicolaou
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Publication number: 20100139406Abstract: Micro-opto-mechanical chemical sensors and methods for simultaneously detecting and discriminating between a variety of vapor-phase analytes. One embodiment of the sensor is a photonic microharp chemical sensor with an array of closely spaced microbridges, each differing slightly in length and coated with a different sorbent polymer. The microbridges can be excited photothermally, and the microbridges can be optically interrogated using microcavity interferometry. Other actuation methods include piezoelectric, piezoresistive, electrothermal, and magnetic. Other read-out techniques include using a lever arm and other interferometric techniques.Type: ApplicationFiled: September 29, 2009Publication date: June 10, 2010Applicant: The Government of the US. as represented by the Secretary of the NavyInventors: Todd H. Stievater, William S. Rabinovich, Nicolas A. Papanicolaou, Robert Bass, Jennifer L. Stepnowski, R. Andrew McGill
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Patent number: 5471072Abstract: Gold, which is the commonly used metallization on .beta.-silicon carbide, is known to degrade at temperatures above 450.degree. C. It also exhibits poor adhesion to silicon carbide. Schottky contacts with platinum metallization have rectifying characteristics similar to contacts with gold metallization. The platinum Schottky contacts remain stable up to 800.degree. C. Adhesion of the platinum deposited at slightly elevated temperatures is also superior to that for gold. Platinum provides a metallization that is physically more rugged and thermally more stable than conventional gold metallization.Type: GrantFiled: December 13, 1993Date of Patent: November 28, 1995Assignee: The United States of America as represented by the Secretary of the NavyInventor: Nicolas A. Papanicolaou
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Patent number: 5270252Abstract: Platinum Schottky contacts remaining stable up to 800.degree. C. have been produced. The adhesion of the platinum deposited at slightly elevated temperatures is good. Platinum provides a metallization that is physically rugged and thermally stable. The Schottky contacts are made on B-Silicon carbide.Type: GrantFiled: July 28, 1992Date of Patent: December 14, 1993Assignee: United States of America as represented by the Secretary of the NavyInventor: Nicolas A. Papanicolaou
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Patent number: 5103280Abstract: A photoconductive semiconductor device having a source, a drain, and a photosensitive channel therebetween. The channel has a surface layer that is highly doped with respect to the remainder of the channel, compensating at least in part for the channel's surface depletion layer. In this manner, the photosensitivity of the device is increased without disproportionately increasing wasted dark current. In a preferred embodiment, the additional doping of the channel's surface layer is done by ion implantation, and the device is a monolith formed of gallium arsenide.Type: GrantFiled: June 29, 1988Date of Patent: April 7, 1992Assignee: The United States of America as represented by the Secretary of the NavyInventors: Phillip E. Thompson, Nicolas A. Papanicolaou, J. Bradley Boos
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Patent number: 5015603Abstract: A low metal resistance ohmic contact alloyed to p InP material having TiW within the contact as a diffusion barrier layer between an underlay of AuZn and an overlay of Au. A process for fabricating an InP JFET containing a gate contact of respective AuZn, TiW, and Au layers and with the gate contact alloyed to p InP material of a semiconductive gate region provides an improved InP JFET having a low resistance metal alloyed ohmic contact to the gate region. Use of the TiW layer in a multilayer contact alloyed to P InP material leads to unique processing and improved InP semiconductor devices.Type: GrantFiled: December 28, 1988Date of Patent: May 14, 1991Assignee: The United States of America as represented by the Secretary of the NavyInventors: John B. Boos, Nicolas A. Papanicolaou, Tung H. Weng
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Patent number: 4924285Abstract: An integrated, planar, single-channel, photodetector-amplifier device is disclosed. The single-channel device includes a photodetector layer and an amplifier layer above the photodetector layer. The photodetector layer is low-doped to give a low dark current and is sufficiently thick to give a high quantum efficiency. The amplifier layer is of a smaller thickness and is a more highly doped material than the photodetector layer, to provide an amplifier having high gain. An insulating layer is included between the photodetector and amplifier layers for electrically isolating the photodetector and amplifier layers. The layers are fabricated on a substrate. Isolation regions are also included for electrically laterally isolating a photodetector, amplifier, and other circuit components comprising the single channel device from each other.Type: GrantFiled: October 25, 1988Date of Patent: May 8, 1990Assignee: The United States of America as represented by the Secretary of the NavyInventors: Gordon W. Anderson, John B. Boos, Harry B. Dietrich, David I. Ma, Ingham A. G. Mack, Nicolas A. Papanicolaou
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Patent number: 4816881Abstract: A low metal resistance ohmic contact alloyed to p InP material having TiW within the contact as a diffusion barrier layer between an underlay of AuZn and an overlay of Au. A process for fabricating an InP JFET containing a gate contact of respective AuZn, TiW, and Au layers and with the gate contact alloyed to p InP material of a semiconductive gate region provides an improved InP JFET having a low resistance metal alloyed ohmic contact to the gate region. Use of the TiW layer in a multilayer contact alloyed to p InP material leads to unique processing and improved InP semiconductor devices.Type: GrantFiled: June 17, 1988Date of Patent: March 28, 1989Assignee: United State of America as represented by the Secretary of the NavyInventors: John B. Boos, Nicolas A. Papanicolaou, Tung H. Weng
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Patent number: 4640003Abstract: A Schottky diode and method of making same in which a n+ doped layer, an n oped layer and an undoped layer of a semi-insulating material selected from the group consisting of gallium arsenide, aluminum gallium arsenide and indium phosphide is grown consecutively on a semi-insulating substrate made of the same material. A mesa with acute angled sides is etched on the undoped layer to such a depth that the n doped layer is exposed. A Schottky and ohmic contact are then deposited on opposite sides of the mesa. The exposed n layer is then bombarded with protons at normal incidence.Type: GrantFiled: September 30, 1985Date of Patent: February 3, 1987Assignee: The United States of America as represented by the Secretary of the NavyInventor: Nicolas A. Papanicolaou
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Patent number: 4611140Abstract: A line imager comprising: a semiconductor body; a planar, transparent piezoelectric body having a main surface overlying and in proximity to the semiconductor body; wave propagation means for propagating acoustic waves on the main surface of the piezoelectric body to create traveling potential wells in the underlying semiconductor body; a traveling potential well path located in the semiconductor, the traveling potential well path beginning at the wave propogation means and extending straight away therefrom; semiconductor depletion means for depleting the semiconductor of majority charge carriers along the traveling potential well path, the depletion means located atop the piezoelectric body; a gate located on the semiconductor body and alongside and parallel to the traveling potential well path and adjoining the semiconductor depletion means; a plurality of sensor pixels for accumulating charge, the sensor pixels located in the semiconductor body, the pixels aligned next to each other and running parallel toType: GrantFiled: August 26, 1985Date of Patent: September 9, 1986Assignee: The United States of America as represented by the Secretary of the NavyInventors: Robert R. Whitlock, Nicolas A. Papanicolaou
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Patent number: 4600853Abstract: A device for the high speed recording of photon images and nonrepetitive electrical waveforms which comprises a waveform recorder wherein surface acoustic waves excited in a can be GaAs, not layered piezoelectric-insulator-semiconductor layered structure produce a traveling electric field in the semiconductor substrate. Charges stored in the traveling potential wells and representing the instantaenous amplitude of a waveform to be recorded are transferred at static wells when a gate is dropped. Because each successive traveling well represents a different time instant of the waveform, the different spatial locations of the static wells correspond to different times. The output signal from the static wells can be selectively delayed before application to a display oscilloscope to enable display of the waveform at a rate many times slower than the actual frequency of the signal waveform.Type: GrantFiled: August 23, 1985Date of Patent: July 15, 1986Assignee: The United States of America as represented by the Secretary of the NavyInventors: Robert R. Whitlock, Nicolas A. Papanicolaou
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Patent number: 4481082Abstract: A method of making rings which includes the steps of placing tubes into a container, filling the container with a bonding material in liquid form, solidifying the bonding material within the container, slicing the container into wafers and then removing the bonding material from the wafers leaving the rings as a residual product. The wafers can also be metalized in order to metalize the upper and lower faces of the rings embedded therein.Type: GrantFiled: November 10, 1982Date of Patent: November 6, 1984Assignee: Martin Marietta CorporationInventor: Nicolas A. Papanicolaou
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Patent number: 4425195Abstract: A method of fabricating a diamond heat sink which includes the steps of metalizing a diamond, temporarily attaching the diamond to a base plate, electroplating the exposed surfaces of the diamond with at least a primary metallic layer to provide a metallic base, and separating the base plate from the diamond thereby leaving the diamond heat sink.Type: GrantFiled: November 10, 1982Date of Patent: January 10, 1984Assignee: Martin Marietta CorporationInventor: Nicolas A. Papanicolaou