Abstract: A charge pumped phase locked loop circuit (PLL) is disclosed that includes a phase detector for detecting the phase error between a reference clock and an output clock to generate a phase error signal. A charge pump is provided that is controlled by the phase error signal to either source current to an intermediate control node or to sink current therefrom. An isolation circuit maintains the intermediate control node at a virtual AC reference voltage such that it remains at substantially the same voltage during the sourcing of current thereto or sinking of current therefrom, the isolation circuit generating a control voltage on the output thereof to control the frequency of the output clock. A loop filter is provided for filtering the control voltage.

Abstract: A method is disclosed for filtering a received RF signal modulated with a time series sampled data signal, each data sample occurring within a bit time. At least a portion of the signal is filtered such that in the frequency domain a portion of the high frequency energy therein is rejected to provide a filtered signal. In the time domain, substantial attenuation regions are disposed forward in time with the step of filtering such that the attenuation regions are disposed within the bit time of subsequent data samples of the time series sampled data signal in the time domain. Sampling of a given filtered received time series sampled data signal occurs substantially proximate in time to the substantial attenuation contributed by prior received data samples.

Abstract: An apparatus and method for comparing the amplitudes of two electric signals Iout and Qout are disclosed. The method includes a step wherein powers conveyed by the signals Iout and Qout are compared. One feature of the method and apparatus is that it is not necessary to storing the maxima of the signals to be compared when these signals are out of phase with respect to each other. One application of the method or apparatus is for the correction of differences in amplitude between I, Q signals that are separated in phase by 90° inside QAM, QPSK or QBSK demodulators.

Abstract: The invention relates to an amplification device AD, comprising a first and a second amplifier AMP1 and AMP2, arranged in cascade, each amplifier being provided with a feedback loop Zi (where i=1 or 2) and having a gain proper Gi equal to Ai/(1+Ai.Zi). In accordance with the invention, the value of the inverse of the gain proper Gi of the first amplifier AMP1 is substantially equal to three times the value of the inverse of the gain proper G2 of the second amplifier AMP2 raised to the power of three: (1/G1)=3/(G2)3. Such a choice provides the amplification device AD with an optimum linearity.

Abstract: The invention relates to an amplification circuit AC comprising a plurality of amplification branches (Di, Hi, ai, where i=1 to N), each one of the branches having a gain proper that makes a contribution to the overall gain of the amplification circuit AC, the size of said contribution being determined by a control signal CNT.

Abstract: The invention relates to an amplification device AD, comprising a first and a second amplifier AMP1 and AMP2, arranged in cascade, each amplifier being provided with a feedback loop Zi (where i=1 or 2) and having a gain proper Gi equal to Ai/(1+Ai.Zi). In accordance with the invention, the value of the inverse of the gain proper Gi of the first amplifier AMP1 is substantially equal to three times the value of the inverse of the gain proper G2 of the second amplifier AMP2 raised to the power of three: (1/G1)=3/(G2)3. Such a choice provides the amplification device AD with an optimum linearity.