Abstract: A noise controlling method includes generating a reference signal representing a primary noise, generating a secondary noise in response to a control signal for cancelling the primary noise, generating an error signal representing a superposition of the primary and secondary noises at a position, generating an additional reference signal, secondary noise, or additional error signal, and generating the control signal for generating the secondary noise using adaptive subband filtering based on the reference and error signals, the generating the control signal including decomposing the reference signal and the error signal into a subband reference and error signal for each subband, updating subband adaptive filters for a subband based on the subband reference signal and the subband error signal, updating a fullband adaptive filter based on the updated subband adaptive filter, and generating the control signal by filtering the reference signal by the updated fullband adaptive filter.

Abstract: A microelectronic structure including a bottom transistor having a gate region aligned along a first axis. An upper transistor located on top of the bottom transistor, where the upper transistor has a gate region that is aligned along a second axis, and where the second axis is perpendicular to the first axis.

Abstract: A long channel transistor structure including a first transistor array adjacent to a second transistor array, a third transistor array adjacent to a fourth transistor array, where the third transistor array and the fourth transistor array are arranged above the first transistor array and the second transistor array, and a continuous channel path through channels of the first transistor array, the second transistor array, the third transistor array, and the fourth transistor array.

Abstract: A turbine for a turbine engine extending along an axis includes an annular casing and at least one turbine stage having a nozzle and a rotor impeller wheel surrounded by a sealing ring with an abradable element. The impeller wheel and the sealing ring are located downstream of the nozzle, and the sealing ring has an upstream end held on the casing by locking means. The turbine includes elastic sealing means in contact with the locking means as well as with the nozzle or the casing so as to press the locking means against the sealing ring. The locking means includes a radially outer portion with a C-shaped cross-section and a radial portion extending radially inwards from the outer portion. The sealing means include two elastic seals bearing on the radial portion, respectively, on either side of the radial portion.

Abstract: A drive arrangement for a vehicle, the drive arrangement comprising a rotatable interface arranged to be mounted to the vehicle, wherein the rotatable interface is rotatably coupled to a mounting arm to allow continuous rotation of the mounting arm in a clockwise and anti clockwise direction that is substantially perpendicular to the longitudinal and transverse axis of the vehicle; and a first electric motor having a stator and a rotor, wherein the stator is coupled to the mounting arm to allow the axis of the rotor to be substantially perpendicular to the rotational axis of the rotatable interface, wherein the rotor is arranged to be coupled to a wheel of the vehicle to allow the electric motor to provide drive torque to the wheel.

Abstract: A semiconductor structure that includes a nanosheet logic device (i.e., nFET and/or pFET) co-integrated with a precision middle-of-the-line (MOL) resistor is provided. The precision MOL resistor is located over a nanosheet device and is present in at least one resistor device region of a semiconductor substrate. The at least one resistor device region can include a first resistor device region in which the MOL resistor is optimized for low capacitance and/or a second resistor device region in which the MOL resistor is optimized for low self-heating.

Abstract: A method and a system for creating a plurality of sound zones within an acoustic cavity is provided. The method comprises: providing a plurality of actuators within the acoustic cavity, each for generating a respective acoustic output in response to a respective drive signal, providing, for each of the plurality of actuators, an adaptive filter for receiving a respective input signal, and generating a respective output signal, providing, for each of the adaptive filters, at least one filter coefficient, providing a plurality of error sensors within the acoustic cavity, each for generating a respective error signal e, representing a respective sound detected by the respective error sensor, providing an audio data signal x(n) for generating a desired sound in a desired sound zone of the plurality of sound zones, determining, for the desired sound zone, a set of actuator generation coefficients kgk, a set of actuator exclusion coefficients kek, wherein k refers to a kth actuator, k=1, 2, 3 . . .

Abstract: A method for manufacturing a part made from composite material of a thermoplastic or thermosetting matrix reinforced with fibers includes producing a structure of fibers, that is optionally pre-impregnated. The method further includes aligning and juxtaposing fibers, while stretching them between return elements, and keeping them separated from each other, so as to obtain a first layer. The method includes superimposing, on said first layer, a second layer obtained in an identical manner to the first, in which the fibers are parallel to those of the first layer and kept apart from it. The method includes repeating the superimposing operation until the desired thickness is obtained and stiffening the material making up the matrix (M) by a method that suits its nature.

Abstract: A first and a second source drain region, an upper source drain contact connected to the first source drain region, a bottom source drain contact connected to the second source drain region, a dielectric spacer surrounds opposite vertical side surfaces of the bottom source drain contact and overlaps a vertical side surface and a lower horizontal surface of a bottom isolation region. A width of the bottom source drain contact wider than a width of the second source drain. Forming an undoped silicon buffer epitaxy in an opening between and below a first and a second nanosheet stack, forming a contact to a first source drain adjacent to that, removing the undoped silicon buffer epitaxy below a second source drain between the first and the second nanosheet stack, forming a bottom contact to that, a width of the bottom contact is wider than a width of the second source drain.

Abstract: A first source drain region adjacent to a first transistor, a second source drain region adjacent to a second transistor, an upper source drain contact above the first source drain region, a bottom source drain contact below the second source drain region, the bottom and the upper source drain contacts are on opposite sides, a horizontal surface of the bottom source drain contact is adjacent to a horizontal surface of dielectric side spacers surrounding the second source drain region. An embodiment where a bottom source drain contact surrounds vertical sides of a source drain region. A method including forming a forming a first and a second nanosheet stacks, forming a top source drain contact to a first source drain region adjacent to the first nanosheet stack, forming a bottom source drain contact to a lower horizontal surface of a second source drain region adjacent to the second nanosheet stack.

Abstract: A semiconductor device includes a p-type field-effect transistor including first channels made of silicon having a (110) crystallographic orientation. The semiconductor device further includes an n-type field-effect transistor including second channels made of silicon having a (100) crystallographic orientation. The semiconductor device further includes a gate surrounding the first channels and the second channels.

Abstract: A semiconductor structure including a gate-all-around input/output (I/O) device and a gate-all-around core logic device integrated on a semiconductor substrate is provided. The gate-all-around I/O device, which has a wider channel length than the gate-all-around core logic device, has a dielectric spacer and/or inner spacers that is (are) laterally wider (i.e., thicker) than a dielectric spacer and/or inner spacers present in the gate-all-around core logic device.

Abstract: A gate-all-around transistor structure including a channel region surrounded on three sides by a gate conductor, and a pair of salicide regions extending from opposite ends of the channel region in a direction parallel with the gate conductor.

Abstract: The present invention is in the field of pneumococcal capsular saccharide conjugate vaccines. Specifically, the present invention relates to sized Streptococcus pneumoniae serotype 6A capsular polysaccharides, in particular Streptococcus pneumoniae serotype 6A capsular polysaccharides having the average size (e.g. Mw) of the Streptococcus pneumoniae serotype 6A capsular polysaccharide is between 100-1000 kDa, suitably conjugated to a carrier protein.

Abstract: Embodiments of present invention provide a method of forming a nanosheet transistor structure. The method includes forming a nanosheet stack on a substrate, the nanosheet stack having a set of nanosheets separated by a set of sacrificial sheets; forming a vertical dielectric pillar separated from the nanosheet stack; forming a dielectric liner lining the nanosheet stack and the vertical dielectric pillar; forming a set of inner spacers between the set of nanosheets; forming a side spacer between the set of inner spacers and the vertical dielectric pillar, the side spacer being surrounded by the dielectric liner at least at a left side between the set of inner spacers and the side spacer and at a right side between the side spacer and the vertical dielectric pillar; and forming a replacement gate stack surrounding the set of nanosheets. A structure formed thereby is also provided.

Abstract: A method and apparatus for enabling compression of a stream of pictures according to a target bit rate are described. A first configuration parameter for a first portion is determined based at least in part on a first relative weight of the first portion with respect to a first set of N portions, where the first set of N portions includes the first portion and N-1 portions which succeed the first portion. A second configuration parameter for a second portion of a second picture is determined based at least in part on a second relative weight of the second portion with respect to a second set of M portions of pictures, where the second set of M portions includes a subset of the N-1 portions from the first set and zero or more additional portions of pictures from the stream of pictures.

Abstract: A ceramic and a method of forming a ceramic including milling steel slag exhibiting a diameter of 5 mm of less to form powder, sieving the powder to retain the powder having a particle size in the range of 20 to 400 removing free iron from the powder with a magnet, heat treating the powder at a temperature in the range of 700° C. to 1200° C. for a time period in the range of 1 hour to 10 hours and oxidizing retained iron in the powder, compacting the powder at a compression pressure in the range of 20 MPa to 300 MPA, and sintering the powder at a temperature in the range of 700° C. to 1400° C. for a time period in the range of 0.5 hours to 4 hours to provide a ceramic.

Abstract: To simplify architecture of a measurement device for affixing to a wall of a moving object or stationary object located in a flow, a device includes a support having compartments with an opening that opens to the exterior of the support at the free face in which sensors are housed, the support having a free face and a face to come into contact with the wall, the free face being opposite the face. The device includes a cavity with a printed circuit board, the compartments including an opening that opens to the exterior of the support in the cavity. The cavity is made in the free face opening into it. The circuit board is upside down in the cavity with the printed face towards the interior of the support. The sensors attached to the circuit board are suspended in the compartments. The unprinted face affords an aerodynamic smooth and planar surface.

Abstract: A semiconductor device includes a first semiconductor layer and a second semiconductor layer. The first semiconductor layer of the semiconductor device includes a standard-gate field-effect transistor. The second semiconductor layer of the semiconductor device includes an extended-gate field-effect transistor. The first semiconductor layer and the second semiconductor layer are formed on top of one another.

Abstract: A semiconductor device includes a bottom device, a top device, and a spacer. The bottom device includes a first set of silicon sheets and a first source-drain epitaxy in direct contact with the first set of silicon sheets. The top device includes a second set of silicon sheets, a set of separation layers, and a second source-drain epitaxy. Each silicon sheet of the second set of silicon sheets is separated by a separation layer of the set of separation layers. The second source-drain epitaxy is arranged in direct contact with the second set of silicon sheets. The spacer is arranged between the first source-drain epitaxy and the second source-drain epitaxy and is arranged between each silicon sheet of the second set of silicon sheets.