Abstract: A large-area electronic device such as, e.g, a large-area image sensor or flat panel display comprises thin-film drive circuitry including inverters each comprising a driver TFT (M1), a load TFT (M2) and a bootstrap capacitor (C.sub.s). Most TFT types which may be used to fabricate the transistors (M1 and M2) have a high parasitic gate capacitance due, inter alia, to overlap of the gate electrode (g) with their source and drain electrodes (21 and 22). This parasitic capacitance degrades the inverter gain Av by coupling between the output line (O/P) of the inverter and the gate electrode (g) of its load device (M2) and an excessively large capacitor (C.sub.s) is required to overcome this degradation. The present invention uses a reduction in the transconductance (gm2) of the load TFT (M2) to permit a reduction in the size of the boot strapping capacitor (C.sub.s) to within practical limits, while still obtaining a desirably high gain Av from the inverter in spite of the parasitic capacitances. A factor .mu..

Abstract: Thin-film circuit elements (M1,M2,M3,R) of a large-area electronic device such as an image sensor or flat panel display are formed with different crystallinity portions (1a,1b) of a semiconductor film (1). Highly crystalline portions (1a) are formed by exposure to an energy beam (25), for example from an excimer laser, while amorphous or low-crystalline portions (1b) are masked by a masking pattern of thermally-stable absorbent or reflective inorganic material (21) on an insulating barrier layer (20). The barrier layer (20) of, for example, silicon oxide has a sufficient thickness (t.sub.b) to mask the amorphous or low-crystallinity film portions (1b) from heating effects in the inorganic material, such as for example heat diffusion and/or impurity diffusion from the inorganic material (21).

Abstract: The off-state leakage current, threshold voltage and on-state current of a thin-film transistor (TFT) can be degraded by operation at high drain bias voltages, e.g. above 15 volts. Such degradation is significantly reduced by forming the drain (6) as a highly-doped semiconductor electrode layer (56) on part of an intermediate lower-doped layer (55) on the semiconductor film (2) forming the TFT channel. The drain electrode layer (56) is laterally separated from the transistor channel. An area (A) of the intermediate layer (55) not overlapped by the electrode layer (56) nor modulated by the gate (4) extends from the drain electrode layer (56) towards the gate (4) so as to provide along the intermediate layer (55) a low-doped field-relief region in at least part of the area of lateral separation. The TFTs may be, for example, of the coplanar type or even of the inverted staggered type.

Abstract: With a semiconductor memory cell (particularly but not exclusively in a thin-film device) having a non-volatile memory transistor (Tm) as a driver transistor, an adequate difference in output signal (I) can be derived from the cell for the different states of the memory transistor (in spite of poor transistor characteristics,) thereby permitting the assembly of a large number of such memory cells in an array (100). Each memory cell includes a load (TI) driven by the non-volatile memory transistor (Tm). In the different memory states of the memory transistor (Tm) a difference in signal occurs at a node (30) between the memory transistor (Tm) and the load (TI). Each cell also includes a switch (To) which is coupled to the node (30) and switched from one output state to another by the signal at the node (30). The output state of the switch (To) provides the output signal (I) from the cell.

Abstract: In the manufacture of a large-area electronic device (e.g. an active-matrix liquid-crystal display or other flat panel display), a TFT of improved lifetime stability results from the inclusion of a field-relief region (22) which is of lower doping concentration than the drain region (12) and which is formed in an area (2) of lateral separation between the channel region (21) and the drain region (22). An energy beam (40), e.g. from an excimer laser, is used to provide the field-relief region (22), by laterally diffusing the doping concentration of the drain region (12) along an area (2) of the semiconductor film (20) significantly larger than the thickness of the semiconductor film (20). The method is simple and easily controllable, an advantageous doping profile (FIG. 3b) is obtained along the field-relief region (22) by this lateral diffusion.

Abstract: In the manufacture of active-matrix liquid-crystal displays or other large area electronic devices, self-aligned photolithographic process steps (FIGS. 2 and 5) are used to define first and second gates (1 and 2) of a TFT from first and second conductive layers (21 and 22). In the first self-aligned step a positive photoresist (26) is selectively exposed by illumination (31) through the substrate (10) while using opaque areas (3 and 4) of the TFT source and drain as a photomask; after developing this selectively-exposed positive photoresist (26) and depositing the first conductive layer (21), a lift-off process is used to leave a first area (21a and 21b) of the first conductive layer where the first and second gates (1 and 2) are to be provided. Then a part (21b) of this first area is removed to leave a smaller, second area (21a) of the first conductive layer (21) for forming the first gate (21).

Abstract: Source (51) and drain (52) of a thin-film transistor (TFT) are formed from a conductive layer (5) using a photolithographic step (FIG. 3) in which the gate (4) serves as a photomask. In accordance with the invention the insulated gate structure (3,4) is formed at the upper face of the channel-forming semiconductor film (2), i.e. remote from the transparent substrate (1). The semiconductor film (2) may be annealed to high-mobility polycrystalline material before depositing the gate structure (3,4) and the overlying conductive layer (5). In this way, high speed TFTs can be formed due to a combination of low gate-to-drain and gate-to-source capacitances and the provision of the transistor channel in the high quality semiconductor material adjacent to the upper face of the film (2). Preferably ultra-violet radiation (20: FIG.

Abstract: In an active matrix addressed electro-optical, e.g. LC, display device of the kind comprising a row and column array of picture elements (12) each associated with a switching transistor (11) to which switching and data signals are supplied via switching and data signal conductors (14, 15) the transistors associated with alternate rows of picture elements are of opposite conductivity type (n,p) and the transistors of separate adjacent pairs of rows share a common switching signal conductor (14) to which switching signals for both conductivity types of transistors are applied, thereby reducing the number of such conductors. The transistors can be polysilicon or a-Si TFTs, or MOSFETs. CMOS technology may be used to produce also an integrated driver circuit (20).