Abstract: A method for performing an etch process on a substrate includes applying a bias signal and a source signal to an electrode of a plasma processing system. The bias signal and the source signal are pulsed RF signals that together define a repeated pulsed RF cycle, wherein each pulsed RF cycle sequentially includes a first state, a second state, a third state, and a fourth state. The power level of the bias signal in the first state is greater than in the third state, which is greater than in the second state, which is greater than in the fourth state. The power level of the source signal in the first state is greater than in the third state, which is greater than in the second state, which is greater than in the fourth state.

Abstract: A method for etching a stack is described. The method includes etching a first nitrogen-containing layer of the stack by applying a non-metal gas and discontinuing the application of the non-metal gas upon determining that a first oxide layer is reached. The first oxide layer is under the first nitrogen-containing layer. The method further includes etching the first oxide layer by applying a metal-containing gas. The application of the metal-containing gas is discontinued upon determining that a second nitrogen-containing layer will be reached. The second nitrogen-containing layer is situated under the first oxide layer. The method includes etching the second nitrogen-containing layer by applying the non-metal gas.

Abstract: Various embodiments herein relate to methods and apparatus for etching a memory hole in a stack of materials on a substrate. In some cases, the stack includes alternating layers of silicon oxide and silicon nitride. In other cases, the stack includes alternating layers of silicon oxide and polysilicon. In either case, three or more sets of processing conditions are used to etch the substrate. Various processing conditions such as the composition of a reactant mixture, pressure, substrate temperature, and/or plasma generation conditions are varied between the three or more sets of processing conditions to produce high quality etching results with high selectivity, a highly vertical etch profile, and a low degree of bowing.

Abstract: A method for multi-state pulsing to achieve a balance between bow control and mask selectivity is described. The method includes generating a primary radio frequency (RF) signal. The primary RF signal pulses among three states including a first state, a second state, and a third state. The method further includes generating a secondary RF signal. The secondary RF signal pulses among the three states. During the first state, the primary RF signal has a power level that is greater than a power level of the secondary RF signal. Also, during the second state, the secondary RF signal has a power level that is greater than a power level of the primary RF signal. During the third state, power levels of the primary and secondary RF signals are approximately equal.

Abstract: A method for performing an etch process on a substrate in a plasma processing system, including: applying source RF power and bias RF power to an electrode; wherein the source RF power and the bias RF power are pulsed signals that together define a plurality of multi-state pulsed RF cycles, each cycle having a first state, second state, and third state; wherein the first state is defined by the source RF power having a first source RF power level and the bias RF power having a first bias RF power level; wherein the second state is defined by the source RF power and the bias RF power having substantially zero power levels; wherein the third state is defined by the source RF power having a second source RF power level less than the first source RF power level, and the bias RF power having a substantially zero power level.

Abstract: A method of etching features in a stack comprising a dielectric material on a substrate is provided. In a step (a) an etch plasma is generated from an etch gas, exposing the stack to the etch plasma, and partially etching features in the stack. In a step (b) after step (a) an atomic layer deposition process is provided to deposit a protective film on sidewalls. The atomic layer deposition process comprises a plurality of cycles, wherein each cycle comprises exposing the stack to a first reactant gas comprising WF6, wherein the first reactant gas is adsorbed onto the stack and exposing the stack to a plasma formed from a second reactant gas, wherein the plasma formed from the second reactant gas reacts with the adsorbed first reactant gas to form the protective film over the stack. In a step (c) steps (a)-(b) are repeated at least one time.

Abstract: Systems and methods for applying three or more states for achieving a high aspect ratio dielectric etch operation are described. In one of the methods, a middle state is introduced between a high state and a low state. The middle state is applied to both a source radio frequency (RF) generator and a bias radio frequency (RF) generator. During the middle state, RF power is maintained to be between a high amount of RF power associated with the high state and a low amount of RF power associated with the low state to achieve the high aspect ratio dielectric etch.

Abstract: Various embodiments herein relate to methods and apparatus for etching a feature in a substrate. Often, the feature is etched in the context of forming a DRAM device. The feature is etched in dielectric material, which often includes silicon oxide. The feature is etched using chemistry that includes WF6. Although WF6 is commonly used as a deposition gas (e.g., to deposit tungsten-containing film), it can also be used during etching. Advantageously, the inclusion of WF6 in the etch chemistry can increase the etch rate of the dielectric material, as well as increase the selectivity of the etch. Unexpectedly, these benefits can be realized without any increase in capping.

Abstract: Methods and apparatus for etching a high aspect ratio feature in a stack on a substrate are provided. The feature may be formed in the process of forming a 3D NAND device. Typically, the stack includes alternating layers of material such as silicon oxide and silicon nitride or silicon oxide and polysilicon. WF6 is provided in the etch chemistry, which substantially reduces or eliminates problematic sidewall notching. Advantageously, this improvement in sidewall notching does not introduce other tradeoffs such as increased bowing, decreased selectivity, increased capping, or decreased etch rate.

Abstract: Methods and apparatus for etching a high aspect ratio feature in a stack on a substrate are provided. The feature may be formed in the process of forming a 3D NAND device. Typically, the stack includes alternating layers of material such as silicon oxide and silicon nitride or silicon oxide and polysilicon. WF6 is provided in the etch chemistry, which substantially reduces or eliminates problematic sidewall notching. Advantageously, this improvement in sidewall notching does not introduce other tradeoffs such as increased bowing, decreased selectivity, increased capping, or decreased etch rate.

Abstract: Various embodiments herein relate to methods and apparatus for etching a feature in a substrate. Often, the feature is etched in the context of forming a DRAM device. The feature is etched in dielectric material, which often includes silicon oxide. The feature is etched using chemistry that includes WF6. Although WF6 is commonly used as a deposition gas (e.g., to deposit tungsten-containing film), it can also be used during etching. Advantageously, the inclusion of WF6 in the etch chemistry can increase the etch rate of the dielectric material, as well as increase the selectivity of the etch. Unexpectedly, these benefits can be realized without any increase in capping.

Abstract: Systems and methods for applying three or more states for achieving a high aspect ratio dielectric etch operation are described. In one of the methods, a middle state is introduced between a high state and a low state. The middle state is applied to both a source radio frequency (RF) generator and a bias radio frequency (RF) generator. During the middle state, RF power is maintained to be between a high amount of RF power associated with the high state and a low amount of RF power associated with the low state to achieve the high aspect ratio dielectric etch.

Abstract: Various embodiments herein relate to methods and apparatus for etching a feature in a substrate. Often, the feature is etched in the context of forming a DRAM device. The feature is etched in dielectric material, which often includes silicon oxide. The feature is etched using chemistry that includes WF6. Although WF6 is commonly used as a deposition gas (e.g., to deposit tungsten-containing film), it can also be used during etching. Advantageously, the inclusion of WF6 in the etch chemistry can increase the etch rate of the dielectric material, as well as increase the selectivity of the etch. Unexpectedly, these benefits can be realized without any increase in capping.

Abstract: Various embodiments herein relate to methods and apparatus for etching a feature in a substrate. Often, the feature is etched in the context of forming a DRAM device. The feature is etched in dielectric material, which often includes silicon oxide. The feature is etched using chemistry that includes WF6. Although WF6 is commonly used as a deposition gas (e.g., to deposit tungsten-containing film), it can also be used during etching. Advantageously, the inclusion of WF6 in the etch chemistry can increase the etch rate of the dielectric material, as well as increase the selectivity of the etch. Unexpectedly, these benefits can be realized without any increase in capping.

Abstract: Systems and methods for applying three or more states for achieving a high aspect ratio dielectric etch operation are described. In one of the methods, a middle state is introduced between a high state and a low state. The middle state is applied to both a source radio frequency (RF) generator and a bias radio frequency (RF) generator. During the middle state, RF power is maintained to be between a high amount of RF power associated with the high state and a low amount of RF power associated with the low state to achieve the high aspect ratio dielectric etch.

Abstract: Various embodiments herein relate to methods, apparatus and systems for forming a recessed feature in dielectric material on a substrate. Separate etching and deposition operations are employed in a cyclic manner. Each etching operation partially etches the feature. Each deposition operation forms a protective coating on the sidewalls of the feature to prevent lateral etch of the dielectric material during the etching operations. The protective coating may be deposited using methods that result in substantial preservation of a mask layer on the substrate. The protective coating may be deposited using particular reactants and/or reaction conditions that are unlikely to damage the mask layer. The protective coating may also be deposited using particular reaction mechanisms that result in substantially complete sidewall coating.

Abstract: Methods, apparatus and systems for forming a recessed feature in dielectric material on a semiconductor substrate are provided. Separate etching and deposition operations are employed in a cyclic manner. Each etching operation partially etches the feature. Each deposition operation forms a protective film on the sidewalls of the feature to prevent lateral etch of the dielectric material during the etching operations. The protective film may be deposited under different conditions (e.g., pressure, duration of reactant delivery, duration of plasma exposure, RF power, and/or RF duty cycle, etc.) in different deposition operations. Such conditions may affect the degree of conformality at which the protective film forms. In various embodiments, one or more protective films may be sub-conformal. In these or other embodiments, one or more other protective films may be conformal.

Abstract: Methods, apparatus and systems for forming a recessed feature in dielectric material on a semiconductor substrate are provided. Separate etching and deposition operations are employed in a cyclic manner. Each etching operation partially etches the feature. Each deposition operation forms a protective film on the sidewalls of the feature to prevent lateral etch of the dielectric material during the etching operations. The protective film may be deposited under different conditions (e.g., pressure, duration of reactant delivery, duration of plasma exposure, RF power, and/or RF duty cycle, etc.) in different deposition operations. Such conditions may affect the degree of conformality at which the protective film forms. In various embodiments, one or more protective films may be sub-conformal. In these or other embodiments, one or more other protective films may be conformal.

Abstract: Various embodiments herein relate to methods, apparatus and systems for forming a recessed feature in dielectric material on a substrate. Separate etching and deposition operations are employed in a cyclic manner. Each etching operation partially etches the feature. Each deposition operation forms a protective coating on the sidewalls of the feature to prevent lateral etch of the dielectric material during the etching operations. The protective coating may be deposited using methods that result in substantial preservation of a mask layer on the substrate. The protective coating may be deposited using particular reactants and/or reaction conditions that are unlikely to damage the mask layer. The protective coating may also be deposited using particular reaction mechanisms that result in substantially complete sidewall coating.

Abstract: Various embodiments herein relate to methods, apparatus and systems for forming a recessed feature in dielectric material on a substrate. Separate etching and deposition operations are employed in a cyclic manner. Each etching operation partially etches the feature. Each deposition operation forms a protective coating on the sidewalls of the feature to prevent lateral etch of the dielectric material during the etching operations. The protective coating may be deposited using methods that result in substantial preservation of a mask layer on the substrate. The protective coating may be deposited using particular reactants and/or reaction conditions that are unlikely to damage the mask layer. The protective coating may also be deposited using particular reaction mechanisms that result in substantially complete sidewall coating.