Patents by Inventor Niles Nian Yang

Niles Nian Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10613943
    Abstract: Systems, methods, and/or devices are used to manage open blocks within non-volatile storage devices, in order to improve the reliability of non-volatile storage devices. In some embodiments, when a shut-down request is received from a host device, the storage device fetches information about open blocks and their boundary regions susceptible to data reliability issues, and for each identified boundary region, the storage device programs a region contiguous to the identified boundary region. In some embodiments, the device updates an XOR parity table used for XOR parity management with the information that the region contiguous to the identified boundary is programmed. Subsequently, in some embodiments, the storage device can use the information, stored in the contiguous region and/or the XOR parity table, for data recovery in the event of a data loss. As a result, the reliability of the non-volatile storage device is improved.
    Type: Grant
    Filed: July 25, 2018
    Date of Patent: April 7, 2020
    Assignee: Western Digital Technologies, Inc.
    Inventors: Zelei Guo, Chao-Han Cheng, Nan Lu, Tienchien Kuo, Niles Nian Yang
  • Publication number: 20190034290
    Abstract: Systems, methods, and/or devices are used to manage open blocks within non-volatile storage devices, in order to improve the reliability of non-volatile storage devices. In some embodiments, when a shut-down request is received from a host device, the storage device fetches information about open blocks and their boundary regions susceptible to data reliability issues, and for each identified boundary region, the storage device programs a region contiguous to the identified boundary region. In some embodiments, the device updates an XOR parity table used for XOR parity management with the information that the region contiguous to the identified boundary is programmed. Subsequently, in some embodiments, the storage device can use the information, stored in the contiguous region and/or the XOR parity table, for data recovery in the event of a data loss. As a result, the reliability of the non-volatile storage device is improved.
    Type: Application
    Filed: July 25, 2018
    Publication date: January 31, 2019
    Inventors: Zelei Guo, Chao-Han Cheng, Nan Lu, Tienchien Kuo, Niles Nian Yang
  • Patent number: 9659666
    Abstract: A non-volatile flash memory has bit lines spanning multiple blocks grouped into columns, where each block is connected along multiple regular columns and one or more redundancy columns. When there is a local column defect, so that the defect is not at the level of the whole block or global column, the portions of a column at an individual block can be remapped to a portion of the same block along a redundant column. Sections of multiple columns from different blocks can be remapped to the same redundancy column. Then a memory block includes a number of independently accessible sub-blocks, the process can also be implemented at the sub-block level. A dynamic, system level implementation is presented.
    Type: Grant
    Filed: August 31, 2015
    Date of Patent: May 23, 2017
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Niles Nian Yang, Chris Avila
  • Publication number: 20170062067
    Abstract: A non-volatile flash memory has bit lines spanning multiple blocks grouped into columns, where each block is connected along multiple regular columns and one or more redundancy columns. When there is a local column defect, so that the defect is not at the level of the whole block or global column, the portions of a column at an individual block can be remapped to a portion of the same block along a redundant column. Sections of multiple columns from different blocks can be remapped to the same redundancy column. Then a memory block includes a number of independently accessible sub-blocks, the process can also be implemented at the sub-block level. A dynamic, system level implementation is presented.
    Type: Application
    Filed: August 31, 2015
    Publication date: March 2, 2017
    Inventors: Niles Nian Yang, Chris Avila