Abstract: A data storage device includes a non-volatile memory device having a number of memory dies. The data storage device further includes a controller. The controller is configured to poll each of the memory dies at a first predetermined rate for a thermal status bit and determine whether the thermal status bit of at least one memory die of the number of memory dies is an active thermal status bit activated. The controller is further configured to reduce the operating performance of the at least one memory die in response to determining that the thermal status bit of the at least one memory die of the plurality of memory dies is the active thermal status bit.

Abstract: A data storage device includes a non-volatile memory device having one or more memory dies and each of the memory dies include a plurality of input-output (I/O) lines. The data storage device further includes a controller. The controller is configured to receive an instruction to enter a low-power operating mode. Entering the low-power operating mode includes removing power from the one or more memory dies, providing an output signal toggling between a logic high and a logic low at a predetermined frequency to the plurality of I/O lines for a predetermined period of time, and operating in the low-power operating mode upon the expiration of the predetermined period of time.

Abstract: A data storage device includes a non-volatile memory device having a number of memory dies. The data storage device further includes a controller. The controller is configured to poll each of the memory dies at a first predetermined rate for a thermal status bit and determine whether the thermal status bit of at least one memory die of the number of memory dies is an active thermal status bit activated. The controller is further configured to reduce the operating performance of the at least one memory die in response to determining that the thermal status bit of the at least one memory die of the plurality of memory dies is the active thermal status bit.

Abstract: A data storage device includes a non-volatile memory device having one or more memory dies and each of the memory dies include a plurality of input-output (I/O) lines. The data storage device further includes a controller. The controller is configured to receive an instruction to enter a low-power operating mode. Entering the low-power operating mode includes removing power from the one or more memory dies, providing an output signal toggling between a logic high and a logic low at a predetermined frequency to the plurality of I/O lines for a predetermined period of time, and operating in the low-power operating mode upon the expiration of the predetermined period of time.

Abstract: A storage system determines that it is undergoing intensive reads by a host, which can occur, for example, when the storage system is being used to play a video game for a prolonged period of time. As performing a conventional read scrub operation in that situation can result in a decrease in performance, the storage system can instead use a targeted read scrub operation to reduce the impact on host read performance. The targeted read scrub operation can take the form, for example, of a periodic read scan on areas of the memory that are not part of the intensive host read, random read scans on neighboring wordlines where only a single state is read, and/or a passive read scan where acceptable but risky pages are marked for relocation.

Abstract: A storage system determines that it is undergoing intensive reads by a host, which can occur, for example, when the storage system is being used to play a video game for a prolonged period of time. As performing a conventional read scrub operation in that situation can result in a decrease in performance, the storage system can instead use a targeted read scrub operation to reduce the impact on host read performance. The targeted read scrub operation can take the form, for example, of a periodic read scan on areas of the memory that are not part of the intensive host read, random read scans on neighboring wordlines where only a single state is read, and/or a passive read scan where acceptable but risky pages are marked for relocation.

Abstract: A data storage device including, in one implementation, a non-volatile memory and a controller. The non-volatile memory includes a memory block. The memory block includes a plurality of word lines that are written sequentially from a first end of the memory block to a second end of the memory block. The controller is coupled to the non-volatile memory. The controller is configured to determine a last written word line of the memory block. The controller is also configured to set a non-selected word line voltage based on the last written word line of the memory block. The controller is further configured to apply the non-selected word line voltage to non-selected word lines of the memory block.

Abstract: The present disclosure generally relates to efficient block usage after ungraceful shutdown (UGSD) events. After a UGSD event, a host device is alerted by the data storage device that a QLC block that was being used prior to the UGSD event is experiencing an ongoing block recovery and that the block is not yet available to accept new data. The block is then checked to determine whether the block can continue to be used for the programming that was occurring at the time of the UGSD event. Once a determination is made, the data storage device notifies the host device so that normal operations may continue. Additionally, the amount of free blocks available for programming is monitored during UGSD events so that the host device can be warned if a power loss halt is triggered.

Abstract: A data storage device including, in one implementation, a non-volatile memory device and a controller coupled to the non-volatile memory device. The non-volatile memory device includes a memory block. The controller is configured to receive a cycle operation request and perform a wear-level mitigation operation in response to receiving the cycle operation request. To perform the wear-level mitigation operation, the controller is configured to determine a read state condition of the memory block, perform the requested cycle operation, and increment a cycle count of the memory block by a value based on the determined read state condition of the memory block. The first read state of the memory block and the second read state of the memory block are based on a wordline voltage that is associated with the memory block.

Abstract: For solid state drive (SSD) or other memory system formed of multiple memory dies, techniques are presented for operation in a standby mode with increased power savings. The memory dies are operable in a regular standby mode and in a low power standby mode. Based upon the amount of current each of the memory dies in the regular standby mode, when the device goes into standby the memory dies that draw higher amounts of current when in the regular standby mode are instead placed into the low power standby mode. The amount of current drawn by each of the memory die in the regular standby mode can be determined for each of the memory dies at die sort or as part of the memory test process, or can be determine by an assembled SSD itself.

Abstract: A data storage system includes a storage medium and a storage controller configured to perform interface training operations. The interface training operations include loading a test data pattern into a first controller buffer of the storage controller, loading the test data pattern into a first storage medium buffer of the storage medium, setting a first read voltage or timing parameter at the storage controller, transferring the test data pattern from the first storage medium buffer to a second controller buffer of the storage controller using the first read voltage or timing parameter, comparing the test data pattern in the first controller buffer with the test data pattern in the second controller buffer, and determining a first read transfer error rate based on the first comparison.

Abstract: A data storage device is configured to mark data for refresh in response to determining that a first measured temperature associated with writing the data to the memory exceeds a first threshold. The data storage device is further configured to refresh the marked data in response to determining that a second measured temperature associated with the memory is below a second threshold.

Abstract: Methods and apparatus for storing parity bits in an available over provisioning (OP) space to recover data lost from an entire memory block. For example, a data storage device may receive data from a host device, write the data to a block, and generate a corresponding block parity. The device may then determine a bit error rate (BER) of the block and an average programming duration to write the data written to the block, calculate a probability of the block becoming defective based on the BER and the average programming duration, and comparing the probability of the block to a set of probabilities respectively corresponding to a set of worst-performing blocks in a NVM. Thereafter, the device may write the block parity to an available over provisioning (OP) space in the NVM responsive to the probability of the block being greater than any probability in the set of probabilities.

Abstract: A data storage device including, in one implementation, a non-volatile memory device and a controller coupled to the non-volatile memory device. The non-volatile memory device includes a memory block. The controller is configured to receive a cycle operation request and perform a wear-level mitigation operation in response to receiving the cycle operation request. To perform the wear-level mitigation operation, the controller is configured to determine a read state condition of the memory block, perform the requested cycle operation, and increment a cycle count of the memory block by a value based on the determined read state condition of the memory block. The first read state of the memory block and the second read state of the memory block are based on a wordline voltage that is associated with the memory block.

Abstract: A storage system and method for boundary wordline data retention handling are provided. In one embodiment, the storage system includes a memory having a single-level cell (SLC) block and a multi-level cell (MLC) block. The system determines if the boundary wordline in the MLC block has a data retention problem (e.g., by determining how long it has been since the boundary wordline was programmed). To address the data retention problem, the storage system can copy data from a wordline in the SLC block that corresponds to the boundary wordline in the MLC block to a wordline in another SLC block prior to de-committing the data in the SLC block. Alternatively, the storage system can reprogram the data in the boundary wordline using a double fine programing technique.

Abstract: The present disclosure generally relates to efficient block usage after ungraceful shutdown (UGSD) events. After a UGSD event, a host device is alerted by the data storage device that a QLC block that was being used prior to the UGSD event is experiencing an ongoing block recovery and that the block is not yet available to accept new data. The block is then checked to determine whether the block can continue to be used for the programming that was occurring at the time of the UGSD event. Once a determination is made, the data storage device notifies the host device so that normal operations may continue. Additionally, the amount of free blocks available for programming is monitored during UGSD events so that the host device can be warned if a power loss halt is triggered.

Abstract: A data storage device including, in one implementation, a non-volatile memory and a controller. The non-volatile memory includes a memory block. The memory block includes a plurality of word lines that are written sequentially from a first end of the memory block to a second end of the memory block. The controller is coupled to the non-volatile memory. The controller is configured to determine a last written word line of the memory block. The controller is also configured to set a non-selected word line voltage based on the last written word line of the memory block. The controller is further configured to apply the non-selected word line voltage to non-selected word lines of the memory block.

Abstract: Methods and apparatus for storing parity bits in an available over provisioning (OP) space to recover data lost from an entire memory block. For example, a data storage device may receive data from a host device, write the data to a block, and generate a corresponding block parity. The device may then determine a bit error rate (BER) of the block and an average programming duration to write the data written to the block, calculate a probability of the block becoming defective based on the BER and the average programming duration, and comparing the probability of the block to a set of probabilities respectively corresponding to a set of worst-performing blocks in a NVM. Thereafter, the device may write the block parity to an available over provisioning (OP) space in the NVM responsive to the probability of the block being greater than any probability in the set of probabilities.

Abstract: A memory apparatus and method of operation is provided. The apparatus includes a plurality of memory cells coupled to a control circuit. The control circuit is configured to receive data indicating a data state for each memory cell of a set of memory cells of the plurality of memory cells and program, in multiple programming loops, the set of memory cells according to the data indicating the data state for each memory cell of the set of memory cells. The control circuit is further configured to determine that the programming of the set of memory cells is in a last programming loop of the multiple programming loops and in response to the determination, receive data indicating a data state for each memory cell of another set of memory cells of the plurality of memory cells.

Abstract: Systems and methods for storage systems using storage device monitoring for load balancing are described. Storage devices may be configured for data access through a common data stream, such as the storage devices in a storage node or server. Data operations from the common data stream may be distributed among the storage devices using a load balancing algorithm. Performance parameter values, such as grown bad blocks, program-erase cycles, and temperature, may be received for the storage devices and used to determine variance values for each storage device. Variance values demonstrating degrading storage devices may be used to reduce the load allocation of data operations to the degrading storage devices.