Abstract: An embodiment of the present invention offloads the generation and monitoring of test packets from a Central processing Unit (CPU) to a dedicated network integrated circuit, such as a router, bridge or switch chip associated with the CPU. The CPU may download test routines and test data to the network IC, which then generates the test packets, identifies and handles received test packets, collects test statistics, and performs other test functions all without loading the CPU. The CPU may be notified when certain events occur, such as when throughput or jitter thresholds for the network are exceeded.

Abstract: An apparatus having a corresponding computer program and method comprises a plurality of ports to receive packets each associated with source and destination Internet protocol version 6 (IPv6) addresses; a site circuit to determine a source site for the source IPv6 address, and a destination site for the destination IPv6 address; a scope circuit to determine a source scope level for the source IPv6 address, and a destination scope level for the destination IPv6 address; a command circuit to select one of a plurality of actions for each of the packets based on the source site and source scope level for the source IPv6 address associated with the packet and the destination site and destination scope level for the destination IPv6 address associated with the packet; wherein the plurality of actions comprises forwarding the packet according to the destination IPv6 address associated with the packet, and dropping the packet.

Abstract: A method, apparatus, and computer-readable media for managing an event queue for a simulation comprising a plurality of events each scheduled to occur at one of a plurality of event times comprises generating a sorted tree data structure comprising a plurality of nodes, wherein each of the nodes in the sorted tree data structure corresponds to only one of the event times, and wherein the nodes of the sorted tree data structure are sorted according to the event times of the nodes; generating an event record for each event; and associating the event records with the nodes so that each of the event records is associated with the node corresponding to the event time at which the respective event is scheduled to occur.

Abstract: A system and method of extending a standard bridge to enable execution of logical bridging functionality are disclosed. In some implementations, a logical bridge may assign source logical port information to a data packet based on characteristics of the data packet, employ the source logical port information to learn the source address and to forward the data packet to a logical egress port, and map the logical egress port to a physical egress port at which the data packet is to be egressed. A tunnel interface may optionally be applied to a data packet upon egress.

Abstract: An embodiment of the present invention offloads the generation and monitoring of test packets from a Central processing Unit (CPU) to a dedicated network integrated circuit, such as a router, bridge or switch chip associated with the CPU. The CPU may download test routines and test data to the network IC, which then generates the test packets, identifies and handles received test packets, collects test statistics, and performs other test functions all without loading the CPU. The CPU may be notified when certain events occur, such as when throughput or jitter thresholds for the network are exceeded.