Patents by Inventor Niranjan Vepuri

Niranjan Vepuri has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10922464
    Abstract: Fabricating a first semiconductor device cell using a first process based on a first process parameter or material comprises extracting semiconductor device parameters from the first process parameters to obtain extracted semiconductor device parameters of a first semiconductor device cell. The fabrication process includes training an artificial intelligence to obtain a predictive artificial intelligence using training data as input, the training data comprising the extracted semiconductor device cell parameters and the first process parameter or material. A proposed process modification is provided to the predictive artificial intelligence to generate a predicted cell delay by the predictive artificial intelligence. The predicted cell delay is evaluated against a cell delay threshold. When the predicted cell delay satisfies the cell delay threshold, a new semiconductor device cell is fabricated using a modified process incorporating the proposed process modification.
    Type: Grant
    Filed: December 10, 2019
    Date of Patent: February 16, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Hui-I Wu, Ke-Ying Su, Wan-Ting Lo, Niranjan Vepuri, Hsiang-Ho Chang
  • Publication number: 20200110913
    Abstract: Fabricating a first semiconductor device cell using a first process based on a first process parameter or material comprises extracting semiconductor device parameters from the first process parameters to obtain extracted semiconductor device parameters of a first semiconductor device cell. The fabrication process includes training an artificial intelligence to obtain a predictive artificial intelligence using training data as input, the training data comprising the extracted semiconductor device cell parameters and the first process parameter or material. A proposed process modification is provided to the predictive artificial intelligence to generate a predicted cell delay by the predictive artificial intelligence. The predicted cell delay is evaluated against a cell delay threshold. When the predicted cell delay satisfies the cell delay threshold, a new semiconductor device cell is fabricated using a modified process incorporating the proposed process modification.
    Type: Application
    Filed: December 10, 2019
    Publication date: April 9, 2020
    Inventors: Hui-I Wu, Ke-Ying Su, Wan-Ting Lo, Niranjan Vepuri, Hsiang-Ho Chang
  • Patent number: 10515172
    Abstract: Fabricating a first semiconductor device cell using a first process based on a first process parameter or material comprises extracting semiconductor device parameters from the first process parameters to obtain extracted semiconductor device parameters of a first semiconductor device cell. The fabrication process includes training an artificial intelligence to obtain a predictive artificial intelligence using training data as input, the training data comprising the extracted semiconductor device cell parameters and the first process parameter or material. A proposed process modification is provided to the predictive artificial intelligence to generate a predicted cell delay by the predictive artificial intelligence. The predicted cell delay is evaluated against a cell delay threshold. When the predicted cell delay satisfies the cell delay threshold, a new semiconductor device cell is fabricated using a modified process incorporating the proposed process modification.
    Type: Grant
    Filed: October 15, 2018
    Date of Patent: December 24, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Hui-I Wu, Ke-Ying Su, Wan-Ting Lo, Niranjan Vepuri, Hsiang-Ho Chang
  • Publication number: 20190121928
    Abstract: Fabricating a first semiconductor device cell using a first process based on a first process parameter or material comprises extracting semiconductor device parameters from the first process parameters to obtain extracted semiconductor device parameters of a first semiconductor device cell. The fabrication process includes training an artificial intelligence to obtain a predictive artificial intelligence using training data as input, the training data comprising the extracted semiconductor device cell parameters and the first process parameter or material. A proposed process modification is provided to the predictive artificial intelligence to generate a predicted cell delay by the predictive artificial intelligence. The predicted cell delay is evaluated against a cell delay threshold. When the predicted cell delay satisfies the cell delay threshold, a new semiconductor device cell is fabricated using a modified process incorporating the proposed process modification.
    Type: Application
    Filed: October 15, 2018
    Publication date: April 25, 2019
    Inventors: Hui-I Wu, Ke-Ying Su, Wan-Ting Lo, Niranjan Vepuri, Hsiang-Ho Chang