Patents by Inventor Nishant S. Nukala

Nishant S. Nukala has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Threshold gate and threshold logic array
    Patent number: 9306151
    Abstract: Threshold gates and related circuitry are disclosed. In one embodiment, a threshold gate includes a threshold realization element and a magnetic tunnel junction (MTJ) element. The MTJ element is switchable from a first resistive state to a second resistive state. To realize a threshold function with the MTJ element, the threshold realization element is configured to switch the magnetic tunnel junction element from the first resistive state to the second resistive state in accordance with the threshold function. In this manner, the threshold gate may implement a threshold function that provides an output just like a complex Boolean function requiring several Boolean gates.
    Type: Grant
    Filed: May 28, 2013
    Date of Patent: April 5, 2016
    Assignee: Arizona Board of Regents, a body corporate of the State of Arizona, acting for and on behalf of Arizona State University
    Inventors: Sarma Vrudhula, Nishant S. Nukala, Niranjan Kulkarni
  • THRESHOLD GATE AND THRESHOLD LOGIC ARRAY
    Publication number: 20130313623
    Abstract: Threshold gates and related circuitry are disclosed. In one embodiment, a threshold gate includes a threshold realization element and a magnetic tunnel junction (MTJ) element. The MTJ element is switchable from a first resistive state to a second resistive state. To realize a threshold function with the MTJ element, the threshold realization element is configured to switch the magnetic tunnel junction element from the first resistive state to the second resistive state in accordance with the threshold function. In this manner, the threshold gate may implement a threshold function that provides an output just like a complex Boolean function requiring several Boolean gates.
    Type: Application
    Filed: May 28, 2013
    Publication date: November 28, 2013
    Applicant: Arizona Board of Regents, a body corporate of the State of Arizona, acting for and on behalf of Ariz
    Inventors: Sarma Vrudhula, Nishant S. Nukala, Niranjan Kulkarni