Patents by Inventor Nitin Sharma

Nitin Sharma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090020621
    Abstract: An aerosol dispenser assembly is disclosed that includes a container holding a liquid product and a compressed gas propellant for propelling the liquid product from the container. A design methodology for the actuator body and swirl nozzle insert is disclosed for maintaining a small particle size or Sauter Mean Diameter (D[3, 2]) of less than 48 ?m at a suitable spray rate (1.5-2 g/s), while utilizing a compressed gas VOC-free propellant for an air freshener product. As obtaining reduced particle size to compete with LPG propellants may result in a reduced spray rate, it is anticipated that one or more nozzles may be designed into the actuator body to maintain a suitable spray rate.
    Type: Application
    Filed: July 17, 2007
    Publication date: January 22, 2009
    Applicant: S.C. JOHNSON & SON, INC.
    Inventors: Paul A. Clark, Richard S. Valpey, III, Prabodh Padma Varanasi, Jeffrey J. Christianson, Nitin Sharma, Milind A. Jog
  • Patent number: 7480888
    Abstract: A design structure embodied in a machine-readable medium is disclosed in one embodiment of the invention as including a flexible logic block to facilitate engineering changes at selected locations within an IC. The flexible logic block has a consistent and identifiable structure such that a simple automated process may be used to reconfigure the structure to perform different logical operations. In certain embodiments, the flexible logic block includes a circuit, such as a multiplexer, having multiple inputs and at least one output. A metal interconnect structure is coupled to the inputs and enables connection of each of the inputs to one of several electrical potentials using a focused-ion-beam (FIB) tool. In this way, the circuit may be configured to perform different logical operations after components in the IC exist in hardware.
    Type: Grant
    Filed: May 21, 2008
    Date of Patent: January 20, 2009
    Assignee: International Business Machines Corporation
    Inventors: Clarence Rosser Ogilvie, Charles B. Winn, David Wills Milton, Kenneth Anthony Lauricella, Nitin Sharma, Paul Mark Schanely, Robert Dov Herzl, Robert Spencer Horton, Tad Jeffrey Wilder, Douglas P. Nadeau
  • Publication number: 20080283624
    Abstract: A multiple nozzle differential fluid delivery head is disclosed. The fluid delivery head includes a body that defines a fluid chamber having a longitudinal axis. The body includes an inlet for connection to a fluid source, and the inlet is in fluid communication with the fluid chamber. The fluid delivery head includes a plurality of outlet ports connected to and extending away from the body. Each outlet port has an interior space in fluid communication with the fluid chamber. The fluid delivery head includes a nozzle insert removably secured in an outer end of each outlet port. At least one nozzle insert has a fluid delivery aperture in fluid communication with the interior space of its associated outlet port for delivering fluid out of the interior space of its associated outlet port. One or more of the outlet ports is angled away from a plane normal to the axis of the fluid delivery head.
    Type: Application
    Filed: May 16, 2007
    Publication date: November 20, 2008
    Inventors: Michael M. Sawalski, Michael J. Skalitzky, Nitin Sharma, Padma Prabodh Varanasi, Yong Chen, Allen D. Miller
  • Publication number: 20080222611
    Abstract: A validation layer that facilitates the automatic annotation of object properties by the object with a validation attribute (e.g., FieldValidation), thereby specifying a set of validation rules declaratively, and scenarios under which these validation rules should fire. During build time, the validation layer iterates through each module and associated module classes to automatically generate the validation code. This not only makes the code more readable, but also ensures that a project has consistent validation handling. The validation layer applies to the annotation and validation at the property-level and inter-property. Thus, property-level validation is employed to ensure the correctness of individual values, and inter-property validation can be employed to ensure the correctness in combinations of values.
    Type: Application
    Filed: March 9, 2007
    Publication date: September 11, 2008
    Applicant: Microsoft Corporation
    Inventor: Nitin Sharma
  • Patent number: 7362840
    Abstract: A method is provided for adjusting timing alignment in which a receiver generates a plurality of imbalanced correction codes (1310), and square waves both having the same frequency. The receiver mixes the imbalanced correction codes with the square waves to create a mixed signal (1320), and integrates the mixed signal over a correction code period to generate a signal power value (1330). The receiver adjusts a phase of the square wave in a first direction when the signal power value satisfies a first criterion (1340, 1350), and in a second direction when the signal power value satisfies a second criterion (1340, 1360). Each imbalanced correction code is symmetrical. And a total integrated value of one of the imbalanced correction codes over the correction code period is either above a first threshold, or below a second threshold, the first threshold being greater than or equal to the second threshold.
    Type: Grant
    Filed: November 18, 2004
    Date of Patent: April 22, 2008
    Assignee: Freescale Semiconductor Inc.
    Inventors: Terence L. Johnson, Timothy R. Miller, Nitin Sharma
  • Publication number: 20070244739
    Abstract: Methods and apparatus are described for measuring engagement of a plurality of users with a product. User engagement data are generated representative of interaction with the product by the plurality of users. The user engagement data correspond to a plurality of user engagement variables. A user engagement score is generated for each of the plurality of users. Each user engagement score includes contributions corresponding to at least two of the user engagement variables for the corresponding user. Each contribution is weighted in accordance with at least one correlation among the plurality of user engagement variables.
    Type: Application
    Filed: April 13, 2006
    Publication date: October 18, 2007
    Inventors: Francesca Soito, Nitin Sharma
  • Publication number: 20070206523
    Abstract: A circuit for adjusting a magnitude of a transmit signal includes a transmitter (105), providing a transmit signal (107). It also includes a transmitter amplifier (109), receiving the transmit signal (107) and a power control adjustment signal (121), and responsive thereto, providing an amplified transmit signal (111). The circuit also includes a detector (1 23), for detecting an amplitude of the amplified transmit signal (111). Also included is an error component (137) for determining the difference between the amplitude and a reference level (129). Further provided is a digital signal generator (155), receiving the difference (145), and responsive thereto, generating (157) a reference signal (125) and the power control adjustment signal (117, 121), where the reference level (129) is responsive to the reference signal (125).
    Type: Application
    Filed: September 30, 2005
    Publication date: September 6, 2007
    Inventors: Phuong Huynh, Nitin Sharma
  • Patent number: 7228120
    Abstract: A method is provided for reducing a DC bias in a receiver. This method includes isolating a second circuit portion from a first circuit portion (535) and determining a second DC bias correction value for the second circuit portion that will eliminate a second DC bias at the isolated second circuit portion (540). The second circuit portion is then connected to the first circuit portion (550) and a bias-maximizing code word is generated at the first circuitry (505). A first DC bias correction value is then determined that will eliminate a first DC bias at the first circuit portion (555). The bias-maximizing code word is formed such that: a first integrated value of a first half of the bias-maximizing code word has a positive value, and a second integrated value of a second half of the bias-maximizing code word over half of the code word length has a negative value.
    Type: Grant
    Filed: November 18, 2004
    Date of Patent: June 5, 2007
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Terence L. Johnson, Nitin Sharma, Ryan W. Lobo
  • Publication number: 20070063883
    Abstract: A circuit is provided for receiving an analog signal and providing a digital signal. It includes pre-amplifiers (601, 603, 605, 607), where each pre-amplifier (601, 603, 605, 607) receives an analog signal (Vin) and a respective reference signal (REF1-REFn). Each of the pre-amplifiers (601, 603, 605, 607) produces an output signal responsive to the analog signal and the respective reference signal. For each of the pre-amplifiers (601, 603, 605, 607), there is provided two or more latches (615, 617, 619, 621, 623, 625) corresponding thereto. Each of the latches (615, 617, 619, 621, 623, 625) receives the output signal and a clock signal and produces a respective digital signal responsive thereto, the clock signal being interleaved. For each of the pre-amplifiers (601, 603, 605, 607), there is a multiplexer (627, 629, 631) corresponding thereto. The multiplexer (627, 629, 631) multiplexes between the respective digital signals to produce a bit in a digital signal.
    Type: Application
    Filed: September 20, 2005
    Publication date: March 22, 2007
    Inventors: Phuong Huynh, Nitin Sharma
  • Publication number: 20070050845
    Abstract: A method and system of authentication for accessing one or more applications by a user by using collaborative agents for automating authentication to the one or more applications. The use of collaborative agents obviates a need for the user to remember fortified authentication credentials for each application.
    Type: Application
    Filed: October 21, 2005
    Publication date: March 1, 2007
    Inventors: Tapas Das, Nitin Sharma, Jingxue Shen
  • Publication number: 20070029365
    Abstract: Embodiments of a differential thermal expansion bonding device are described for the high volume bonding of laminae together to form a MECS device. One embodiment of the device comprises a frame, engager made of a solid, liquid or gas, preload with springs and platens. Other embodiments of a method for bonding laminae together to form a MECS device using surface mount technology (SMT) techniques are described, with one embodiment being directed towards conveyorized bonding. The method including providing laminae to be bonded that do not include a solder mask, microething at least a portion of at least one lamina, applying solder paste to a microetched portion, and bonding the laminae together using the solder paste. A method for continuously bonding laminae also is described, such as by using a conveyorized furnace for applying heat to a workpiece functionally associated with the bonding device. The method can include forced convective heating, cooling or both, using inert gas flush.
    Type: Application
    Filed: October 25, 2004
    Publication date: February 8, 2007
    Inventors: Brian Paul, Toni Doolen, Christoph Pluess, Nitin Sharma
  • Publication number: 20060248487
    Abstract: A method for optimization of clock gating in integrated circuit (IC) design. Clock gating techniques are very useful in reducing the electrical power consumed by an IC. A general method for identifying registers that are candidates for clock gating is presented. Furthermore, a determination is made regarding which of the candidate registers to clock gate in order to achieve optimal power and IC area savings. The determination is based on switching activity of the candidate registers.
    Type: Application
    Filed: May 22, 2006
    Publication date: November 2, 2006
    Applicant: ATRENTA, INC.
    Inventors: Bhanu Kapoor, Debabrata Bagchi, Nitin Sharma
  • Publication number: 20060206474
    Abstract: Techniques are provided for modifying queries to increase the number of sponsored links that are returned in response to the queries. A query modification system uses a predefined set of rules that are designated to modify a query to increase the chance that the modified query will match more sponsored links. The modified query is then matched against a listing of search query strings that have been pre-selected by sponsors. Each pre-selected search query strings corresponds to one or more sponsored web links. If the modified query matches one of the pre-selected search query strings, the corresponding sponsored web links are returned and displayed to the user.
    Type: Application
    Filed: March 10, 2005
    Publication date: September 14, 2006
    Applicant: Yahoo!, Inc.
    Inventors: Shyam Kapur, Nitin Sharma
  • Publication number: 20060104337
    Abstract: A method is provided for adjusting timing alignment in which a receiver generates a plurality of imbalanced correction codes (1310), and square waves both having the same frequency. The receiver mixes the imbalanced correction codes with the square waves to create a mixed signal (1320), and integrates the mixed signal over a correction code period to generate a signal power value (1330). The receiver adjusts a phase of the square wave in a first direction when the signal power value satisfies a first criterion (1340, 1350), and in a second direction when the signal power value satisfies a second criterion (1340, 1360). Each imbalanced correction code is symmetrical. And a total integrated value of one of the imbalanced correction codes over the correction code period is either above a first threshold, or below a second threshold, the first threshold being greater than or equal to the second threshold.
    Type: Application
    Filed: November 18, 2004
    Publication date: May 18, 2006
    Inventors: Terence Johnson, Timothy Miller, Nitin Sharma
  • Publication number: 20060105731
    Abstract: A method is provided for reducing a DC bias in a receiver. This method includes isolating a second circuit portion from a first circuit portion (535) and determining a second DC bias correction value for the second circuit portion that will eliminate a second DC bias at the isolated second circuit portion (540). The second circuit portion is then connected to the first circuit portion (550) and a bias-maximizing code word is generated at the first circuitry (505). A first DC bias correction value is then determined that will eliminate a first DC bias at the first circuit portion (555). The bias-maximizing code word is formed such that: a first integrated value of a first half of the bias-maximizing code word has a positive value, and a second integrated value of a second half of the bias-maximizing code word over half of the code word length has a negative value.
    Type: Application
    Filed: November 18, 2004
    Publication date: May 18, 2006
    Inventors: Terence Johnson, Nitin Sharma, Ryan Lobo
  • Publication number: 20050228775
    Abstract: A system for dynamically adaptively personalizing at least one navigation control for a web site. Based on collected behaviors for a user, at least one navigation control is dynamically updated to link to a portion of the web site that may be of most interest to the user. Personalized navigation controls for accessing portions of the web site can be dynamically arranged on the web page displayed to the user. Additionally, the personalized navigation may be employed to drives screens of a mobile or living room device.
    Type: Application
    Filed: November 30, 2004
    Publication date: October 13, 2005
    Applicant: Yahoo! Inc.
    Inventors: Lars Nilsen, Donna Boyer, Nilesh Gohel, Nitin Sharma, Pete Orelup, Ken Thomas, Scott Gatz, Jawahar Malhotra, Harry Fung
  • Publication number: 20050068910
    Abstract: An optimized network (300), includes providing a switch card topology (350) having a plurality of switching elements (305), where the plurality of switching elements are arranged to form a switch configuration (303). N number of payload interfaces (307) are coupled to the switch configuration, where each of the N number of payload interfaces is coupled to interface with one of a plurality of payload slots (308). A set of N payload module configurations (402, 502) is characterized by a sequential addition (320) of a payload module (304) into each of the plurality of payload slots, where the sequential addition of the payload module couples the payload module to the network. N number of payload interfaces are coupled to the switch configuration such that a latency function (616) is minimized for the switch configuration and the set of N payload module configurations.
    Type: Application
    Filed: September 12, 2003
    Publication date: March 31, 2005
    Inventors: Douglas Sandy, Nitin Sharma
  • Publication number: 20050058140
    Abstract: An optimized network (300), includes providing a switch card topology (350) having a plurality of switching elements (305), where the plurality of switching elements are arranged to form a switch configuration (303). N number of payload interfaces (307) are coupled to the switch configuration, where each of the N number of payload interfaces is coupled to interface with one of a plurality of payload slots (308). A set of N payload module configurations (402, 502) is characterized by a sequential addition (320) of a payload module (304) into each of the plurality of payload slots, where the sequential addition of the payload module couples the payload module to the network. N number of payload interfaces are coupled to the switch configuration such that a latency function (616) is minimized for the switch configuration and the set of N payload module configurations.
    Type: Application
    Filed: September 12, 2003
    Publication date: March 17, 2005
    Inventors: Douglas Sandy, Nitin Sharma