Patents by Inventor Nitin Singh

Nitin Singh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9285424
    Abstract: A controller executes a first LBIST test on a device at a first shift frequency on a plurality of partitions and detects any voltage drop at sense points in each partition during the test. If a voltage drop is detected, then the test is re-run for those partitions that failed the first test. If failures are detected during the re-execution, then a further test at a lower shift frequency is performed. The partitions can be tested sequentially or in parallel and invention has the advantage of reducing the time taken for executing LBIST when the device is booted.
    Type: Grant
    Filed: July 25, 2014
    Date of Patent: March 15, 2016
    Assignee: FREESCALE SEMICONDUCTOR,INC.
    Inventors: Nitin Singh, Amit Jindal, Anurag Jindal
  • Patent number: 9280669
    Abstract: The present invention provides a method and system for calculating a security index of an application hosted in a cloud environment. The application is mapped to a cloud service provider of the cloud environment, and a set of security controls and a set of security metrics applicable for the application are identified. The set of security controls and the set of security metrics are encapsulated into a security profile object by a security control module. A set of values of the set of security metrics are retrieved from the cloud service provider, by a cloud probe module, and the security index of the application is calculated.
    Type: Grant
    Filed: May 10, 2013
    Date of Patent: March 8, 2016
    Assignee: Infosys Limited
    Inventors: Nitin Singh Chauhan, Ashutosh Saxena
  • Patent number: 9270174
    Abstract: An integrated circuit includes a set of electronic circuits, a voltage regulator, and a power management module. The power management module includes a set of dummy circuits connected to the set of electronic circuits, a control signal generator, a counter and a shift register. The control signal generator generates a control signal based on the current consumption of the set of electronic circuits dropping below a threshold value over a predefined period of time. The counter generates a count signal for a predetermined time period when the control signal is activated. The shift register receives the count signal, enables the dummy circuits when the count signal is received, and disables the dummy circuits in a daisy chain fashion during the predetermined time period.
    Type: Grant
    Filed: May 12, 2013
    Date of Patent: February 23, 2016
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Lalit Mohan Singh Miyan, Kumar Abhishek, Nitin Singh
  • Publication number: 20160025808
    Abstract: A controller executes a first LBIST test on a device at a first shift frequency on a plurality of partitions and detects any voltage drop at sense points in each partition during the test. If a voltage drop is detected, then the test is re-run for those partitions that failed the first test. If failures are detected during the re-execution, then a further test at a lower shift frequency is performed. The partitions can be tested sequentially or in parallel and invention has the advantage of reducing the time taken for executing LBIST when the device is booted.
    Type: Application
    Filed: July 25, 2014
    Publication date: January 28, 2016
    Applicant: Freescale Semiconductor, Inc.
    Inventors: Nitin Singh, Amit Jindal, Anurag Jindal
  • Publication number: 20150286525
    Abstract: Hardware processors in an SOC integrated circuit logically swapping memories by remapping memory addresses, including tightly coupled and local memories, to enable a sequence of data-processing algorithms to execute more quickly by different hardware processors without having to copy the data between different memories using a relatively slow data crossbar switch. When a memory stores error-correction code (ECC) address information linking stored ECC data with stored user data, the hardware processor dynamically remaps the ECC address information, as needed.
    Type: Application
    Filed: April 6, 2014
    Publication date: October 8, 2015
    Applicant: Freescale Semiconductor, Inc.
    Inventors: Nitin Singh, Gaurav Jain, Amit Jindal, Rohit Tomar
  • Publication number: 20150180835
    Abstract: The present invention provides a method and system for verifying integrity of cloud data using unconnected trusted device. The method involves requesting encrypted data though a terminal from a metadata offsite location on a cloud storage then entering encrypted data into an unconnected trusted device thereafter obtaining sentinel data from one or more predefined sentinel locations in encrypted data then requesting original data from the cloud storage through the terminal from the unconnected trusted device thereafter comparing sentinel data and original data for integrity and finally displaying the results.
    Type: Application
    Filed: December 5, 2014
    Publication date: June 25, 2015
    Inventors: Ashutosh Saxena, Nitin Singh Chauhan, Sravan Kumar Rondla
  • Patent number: 9032532
    Abstract: The present invention provides a method and system for calculating a security index of an application hosted in a cloud environment. The application is mapped to a cloud service provider of the cloud environment, and a set of security controls and a set of security metrics applicable for the application are identified. The set of security controls and the set of security metrics are encapsulated into a security profile object by a security control module. A set of values of the set of security metrics are retrieved from the cloud service provider, by a cloud probe module, and the security index of the application is calculated.
    Type: Grant
    Filed: May 10, 2013
    Date of Patent: May 12, 2015
    Assignee: Infosys Limited
    Inventors: Nitin Singh Chauhan, Ashutosh Saxena
  • Publication number: 20150127546
    Abstract: Techniques for providing internet services to a user through a toll free connection are provided. The techniques include receiving, from an Internet Access Point (IAP), a request for the internet services through the toll free connection provided by a Cloud Service Provider (CSP), wherein the CSP is selected by the user from a plurality of CSPs. Access credentials are received from IAP and are forwarded to the selected CSP. A token is received from the CSP if the user is authenticated by the CSP based on the access credentials. The token is sent to the IAP wherein the token is used by the user to access the Internet services through the toll free connection.
    Type: Application
    Filed: September 22, 2014
    Publication date: May 7, 2015
    Inventors: Ashutosh Saxena, Nitin Singh Chauhan
  • Publication number: 20150085626
    Abstract: The present invention describes a system, method and computer product program for computation of alarm time. The system includes an alarm device for generating an alarm. The system also includes an alarm application hosted on the alarm device for providing at least one user defined alarm condition. The system further includes an alarm engine for receiving the user defined alarm condition, initiating a probe to receive data from data sources, processing the received alarm conditions and the received data to compute the alarm time and next probe time repeating iteratively until the next probe time is less than the computed alarm time. The system generates alarm at the computed alarm time when the next probe time becomes greater than the alarm time.
    Type: Application
    Filed: September 23, 2014
    Publication date: March 26, 2015
    Inventors: Ashutosh Saxena, Nitin Singh Chauhan
  • Publication number: 20150088777
    Abstract: The present invention relates to a method to detect online privacy violation. The method comprising steps of embedding a tracker into a web browser to open at least one data consumer website or at least one third party website wherein a user submits at least one data value into their corresponding data field in a data consumer website; generating one or more privacy profile using the tracker wherein the profile assists the user to select one or more data fields as per the user preferences; capturing the user selected one or more data fields and their corresponding plurality of browsing history using the tracker; storing the profile and the plurality of browsing history into at least one database; triggering of the tracker for detecting online privacy violation in a third party website and submitting at least one data field into at least one input field to detect online privacy violation for the submitted data field.
    Type: Application
    Filed: September 22, 2014
    Publication date: March 26, 2015
    Inventors: Nitin Singh Chauhan, Ashutosh Saxena, Krishna Chaitanya T
  • Publication number: 20140333133
    Abstract: An integrated circuit includes a set of electronic circuits, a voltage regulator, and a power management module. The power management module includes a set of dummy circuits connected to the set of electronic circuits, a control signal generator, a counter and a shift register. The control signal generator generates a control signal based on the current consumption of the set of electronic circuits dropping below a threshold value over a predefined period of time. The counter generates a count signal for a predetermined time period when the control signal is activated. The shift register receives the count signal, enables the dummy circuits when the count signal is received, and disables the dummy circuits in a daisy chain fashion during the predetermined time period.
    Type: Application
    Filed: May 12, 2013
    Publication date: November 13, 2014
    Inventors: Lalit Mohan Singh Miyan, Kumar Abhishek, Nitin Singh
  • Patent number: 8868989
    Abstract: A system for testing an error detection circuit includes a fault injection unit for operating the error detection circuit in a fault injection mode. A fault is inserted in either of a primary or a redundant processor. Output signals generated by the primary and redundant processors are compared and checked for a mismatch and the error detection circuit outputs a test signal based on the comparison result.
    Type: Grant
    Filed: July 12, 2012
    Date of Patent: October 21, 2014
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Amit Jindal, Nitin Singh
  • Patent number: 8841952
    Abstract: An integrated circuit (IC) includes a flip-flop that stores data when the IC is in built-in self-test (BIST) mode. The flip-flop includes a master latch connected to a slave latch, which in turn is connected to a data retention latch. A control circuit is connected to the flip-flop. During normal operation, the master latch receives a data input signal, which is transmitted through the slave latch to another flip-flop of the IC. When the control circuit initiates BIST (scan testing), data stored in the slave latch is transferred to the data retention latch. Upon completion of BIST, the data stored in the retention latch is used to restore the flip-flop to its original state.
    Type: Grant
    Filed: May 27, 2013
    Date of Patent: September 23, 2014
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Nitin Singh, Amit Jindal, Anurag Jindal
  • Publication number: 20140019818
    Abstract: A system for testing an error detection circuit includes a fault injection unit for operating the error detection circuit in a fault injection mode. A fault is inserted in either of a primary or a redundant processor. Output signals generated by the primary and redundant processors are compared and checked for a mismatch and the error detection circuit outputs a test signal based on the comparison result.
    Type: Application
    Filed: July 12, 2012
    Publication date: January 16, 2014
    Applicant: FREESCALE SEMICONDUCTOR
    Inventors: Amit Jindal, Nitin Singh
  • Publication number: 20130305376
    Abstract: The present invention provides a method and system for calculating a security index of an application hosted in a cloud environment. The application is mapped to a cloud service provider of the cloud environment, and a set of security controls and a set of security metrics applicable for the application are identified. The set of security controls and the set of security metrics are encapsulated into a security profile object by a security control module. A set of values of the set of security metrics are retrieved from the cloud service provider, by a cloud probe module, and the security index of the application is calculated.
    Type: Application
    Filed: May 10, 2013
    Publication date: November 14, 2013
    Applicant: Infosys Limited
    Inventors: Nitin Singh Chauhan, Ashutosh Saxena
  • Publication number: 20130227257
    Abstract: A data processor includes a reset controller for controlling reset of the processing system and a volatile memory controller for controlling writing data to a volatile memory module, typically a RAM module. The reset controller responds to an asynchronous reset signal to inhibit write operations of the volatile memory controller to the volatile memory module and to delay reset of the processing system until the write operations have been inhibited.
    Type: Application
    Filed: February 23, 2012
    Publication date: August 29, 2013
    Applicant: FREESCALE SEMICONDUCTOR, INC
    Inventors: Nitin Singh, Arjun Pal Chowdhury
  • Patent number: 7643856
    Abstract: A mobile communication device (100) uses a local wireless transceiver (108) to establish an asynchronous link (202) with a remote audio processor (110) which is typically operated in a low power mode and that maintains an association between the mobile communication device and remote audio processor. When the mobile communication device receives an incoming call page (210), the mobile communication device initiates a synchronous link with the remote audio processor, and responds to the incoming call page at a time when the call will be connected only after the synchronous link is established.
    Type: Grant
    Filed: December 9, 2005
    Date of Patent: January 5, 2010
    Assignee: Motorola, Inc.
    Inventors: Jared R. Daniels, James L. Howard, Nitin Singh
  • Publication number: 20070135148
    Abstract: A mobile communication device (100) uses a local wireless transceiver (108) to establish an asynchronous link (202) with a remote audio processor (110) which is typically operated in a low power mode and that maintains an association between the mobile communication device and remote audio processor. When the mobile communication device receives an incoming call page (210), the mobile communication device initiates a synchronous link with the remote audio processor, and responds to the incoming call page at a time when the call will be connected only after the synchronous link is established.
    Type: Application
    Filed: December 9, 2005
    Publication date: June 14, 2007
    Inventors: Jared Daniels, James Howard, Nitin Singh