Patents by Inventor Nobuaki Hatori

Nobuaki Hatori has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090263926
    Abstract: An active layer having a p-type quantum dot structure is disposed over a lower cladding layer made of semiconductor material of a first conductivity type. An upper cladding layer is disposed over the active layer. The upper cladding layer is made of semiconductor material, and includes a ridge portion and a cover portion. The ridge portion extends in one direction, and the cover portion covers the surface on both sides of the ridge portion. A capacitance reducing region is disposed on both sides of the ridge portion and reaching at least the lower surface of the cover portion. The capacitance reducing region has the first conductivity type or a higher resistivity than that of the ridge portion, and the ridge portion has a second conductivity type. If the lower cladding layer is an n-type, the capacitance reducing region reaches at least the upper surface of the lower cladding layer.
    Type: Application
    Filed: June 18, 2009
    Publication date: October 22, 2009
    Applicants: FUJITSU LIMITED, THE UNIVERSITY OF TOKYO
    Inventors: Nobuaki Hatori, Tsuyoshi Yamamoto, Hisao Sudo, Yasuhiko Arakawa
  • Patent number: 7573060
    Abstract: An active layer having a p-type quantum dot structure is disposed over a lower cladding layer made of semiconductor material of a first conductivity type. An upper cladding layer is disposed over the active layer. The upper cladding layer is made of semiconductor material, and includes a ridge portion and a cover portion. The ridge portion extends in one direction, and the cover portion covers the surface on both sides of the ridge portion. A capacitance reducing region is disposed on both sides of the ridge portion and reaching at least the lower surface of the cover portion. The capacitance reducing region has the first conductivity type or a higher resistivity than that of the ridge portion, and the ridge portion has a second conductivity type. If the lower cladding layer is an n-type, the capacitance reducing region reaches at least the upper surface of the lower cladding layer.
    Type: Grant
    Filed: October 22, 2007
    Date of Patent: August 11, 2009
    Assignees: Fujitsu Limited, The University of Tokyo
    Inventors: Nobuaki Hatori, Tsuyoshi Yamamoto, Hisao Sudo, Yasuhiko Arakawa
  • Patent number: 7522647
    Abstract: An intrinsic GaAs waveguide layer is formed on a p-type AlGaAs cladding layer, a quantum dot active layer is formed further thereon. An n-type AlGaAs cladding layer is formed on the center portion of the quantum dot active layer. Thus-configured semiconductor laser is allowed to successfully suppress the area of the p-n junction plane to a small level, and to obtain a high level of reliability, because there is no need of processing the center portion of the quantum dot active layer, contributive to laser oscillation.
    Type: Grant
    Filed: January 30, 2006
    Date of Patent: April 21, 2009
    Assignees: Fujitsu Limited, The University of Tokyo
    Inventors: Nobuaki Hatori, Tsuyoshi Yamamoto, Koji Otsubo, Yasuhiko Arakawa
  • Publication number: 20090086785
    Abstract: A semiconductor light emitting device is provided with a GaAs substrate, a quantum dot active layer formed over the GaAs substrate, a GaAs layer formed above or below the quantum dot active layer, and a diffraction grating formed from InGaP or InGaAsP and periodically provided along an propagating direction of light in the GaAs layer.
    Type: Application
    Filed: August 27, 2008
    Publication date: April 2, 2009
    Applicants: FUJITSU LIMITED, THE UNIVERSITY OF TOKYO
    Inventors: Nobuaki HATORI, Tsuyoshi YAMAMOTO, Manabu MATSUDA, Yasuhiko ARAKAWA
  • Publication number: 20080232417
    Abstract: A semiconductor light emitting device includes a lower cladding layer, an active layer, and an AlGaAs upper cladding layer mounted on a GaAs substrate. The semiconductor light emitting device has a ridge structure including the AlGaAs upper cladding layer. The semiconductor light emitting device further includes an InGaAs etching stop layer provided in contact with the lower side of the AlGaAs upper cladding layer. The InGaAs etching stop layer has a band gap greater than that of the active layer.
    Type: Application
    Filed: March 19, 2008
    Publication date: September 25, 2008
    Applicants: FUJITSU LIMITED, THE UNIVERSITY OF TOKYO
    Inventors: Nobuaki HATORI, Tsuyoshi YAMAMOTO, Hisao SUDO, Yasuhiko ARAKAWA
  • Publication number: 20080157059
    Abstract: An active layer having a p-type quantum dot structure is disposed over a lower cladding layer made of semiconductor material of a first conductivity type. An upper cladding layer is disposed over the active layer. The upper cladding layer is made of semiconductor material, and includes a ridge portion and a cover portion. The ridge portion extends in one direction, and the cover portion covers the surface on both sides of the ridge portion. A capacitance reducing region is disposed on both sides of the ridge portion and reaching at least the lower surface of the cover portion. The capacitance reducing region has the first conductivity type or a higher resistivity than that of the ridge portion, and the ridge portion has a second conductivity type. If the lower cladding layer is an n-type, the capacitance reducing region reaches at least the upper surface of the lower cladding layer.
    Type: Application
    Filed: October 22, 2007
    Publication date: July 3, 2008
    Applicants: FUJITSU LIMITED, THE UNIVERSITY OF TOKYO
    Inventors: Nobuaki Hatori, Tsuyoshi Yamamoto, Hisao Sudo, Yasuhiko Arakawa
  • Publication number: 20080144691
    Abstract: An active layer (18) is formed over a semiconductor substrate having a pair of facets (15A, 15B) mutually facing opposite directions. An upper cladding layer (19) is formed on the active layer, having a refractive index lower than that of the active layer. A diffraction grating (25) is disposed in the upper cladding layer on both sides of a distributed feedback region in a waveguide region (22), the waveguide region extending from one facet to the other of the semiconductor substrate. End regions (22B) are defined at both ends of the waveguide region and the distributed feedback region (22A) is disposed between the end regions. Low refractive index regions (26) are disposed in the upper cladding layer on both sides of each of the end regions of the waveguide region, the low refractive index regions having a refractive index lower than that of the upper cladding layer.
    Type: Application
    Filed: October 22, 2007
    Publication date: June 19, 2008
    Applicants: FUJITSU LIMITED, THE UNIVERSITY OF TOKYO
    Inventors: Nobuaki Hatori, Tsuyoshi Yamamoto, Yasuhiko Arakawa
  • Publication number: 20080042122
    Abstract: A semiconductor light emitting element improving luminous efficiency has: a semiconductor substrate, an N-type cladding layer formed over the substrate; a barrier layer formed over the cladding layer; a quantum dot layer formed over the barrier layer, the quantum dot layer including quantum dots having a band gap smaller than that of the barrier layer and a buried layer having a band gap larger than that of the quantum dots, the buried layer covering a sidewall of the quantum dots; a P-type semiconductor layer formed over the quantum dot layer, the semiconductor layer having a band gap smaller than that of the barrier layer; a barrier layer formed over the P-type semiconductor layer, the barrier layer having a band gap larger than those of the quantum dots and of the semiconductor layer; and a p-type cladding layer formed over the barrier layer. Therefore, holes generated in the P-type semiconductor layer are prevented from flowing into the barrier layer and the buried layer.
    Type: Application
    Filed: August 13, 2007
    Publication date: February 21, 2008
    Applicants: FUJITSU LIMITED, THE UNIVERSITY OF TOKYO
    Inventors: Nobuaki Hatori, Tsuyoshi Yamamoto, Yoshiaki Nakata, Yasuhiko Arakawa
  • Publication number: 20070248134
    Abstract: An optical semiconductor device includes: a waveguide structure including layers grown over a semiconductor substrate, having a width defined by sidewalls formed by etching the layers, and including a wide, a narrow, and an intermediate width portion, formed along a propagation direction; and a diffraction grating formed on the sidewalls of at least one of the wide and narrow width portions of the waveguide structure, the diffraction grating having vertical grooves periodically disposed along the propagation direction and defining a wavelength of propagation light, wherein the narrow width portion is formed in such a manner that a loss of 50% or more is given to a higher order transverse mode. An optical semiconductor device having a vertical diffraction grating is provided which can suppress generation of a higher order transverse mode and an increase in a device resistance.
    Type: Application
    Filed: March 9, 2007
    Publication date: October 25, 2007
    Applicants: FUJITSU LIMITED, THE UNIVERSITY OF TOKYO
    Inventors: Nobuaki Hatori, Tsuyoshi Yamamoto, Yasuhiko Arakawa
  • Publication number: 20060222028
    Abstract: An intrinsic GaAs waveguide layer is formed on a p-type AlGaAs cladding layer, a quantum dot active layer is formed further thereon. An n-type AlGaAs cladding layer is formed on the center portion of the quantum dot active layer. Thus-configured semiconductor laser is allowed to successfully suppress the area of the p-n junction plane to a small level, and to obtain a high level of reliability, because there is no need of processing the center portion of the quantum dot active layer, contributive to laser oscillation.
    Type: Application
    Filed: January 30, 2006
    Publication date: October 5, 2006
    Applicants: FUJITSU LIMITED, THE UNIVERSITY OF TOKYO
    Inventors: Nobuaki Hatori, Tsuyoshi Yamamoto, Koji Otsubo, Yasuhiko Arakawa
  • Patent number: 7081983
    Abstract: A wavelength conversion device including a nonlinear medium having quantum dots uses a tunable laser as an excitation light source of optical four wave mixing, and performs wavelength conversion for a wide bandwidth signal light with optical four wave mixing by employing a control apparatus for controlling an optical system including an optical path of a signal light and an optical system including an optical path of an excitation light in correspondence with a wavelength of a signal light that is to be wavelength converted.
    Type: Grant
    Filed: December 29, 2004
    Date of Patent: July 25, 2006
    Assignee: Fujitsu Limited
    Inventors: Tomoyuki Akiyama, Nobuaki Hatori, Mitsuru Sugawara
  • Publication number: 20050117200
    Abstract: A wavelength conversion device including a nonlinear medium having quantum dots uses a tunable laser as an excitation light source of optical four wave mixing, and performs wavelength conversion for a wide bandwidth signal light with optical four wave mixing by employing a control apparatus for controlling an optical system including an optical path of a signal light and an optical system including an optical path of an excitation light in correspondence with a wavelength of a signal light that is to be wavelength converted.
    Type: Application
    Filed: December 29, 2004
    Publication date: June 2, 2005
    Applicant: FUJITSU LIMITED
    Inventors: Tomoyuki Akiyama, Nobuaki Hatori, Mitsuru Sugawara
  • Patent number: 6867057
    Abstract: An AlGaAs cladding layer is formed on a GaAs semiconductor substrate, and then an i-type GaAs layer is formed thereon. Then, stripe-like grooves are formed in the GaAs layer by the photolithography method, and then an InAs layer is formed by the MBE method. At this time, edges of convex portions are deformed to be gentle with a rise of a substrate temperature, and thus flat portions are almost eliminated. Then, InAs is hardly deposited on slant surfaces of the convex portions and the InAs is grown on the bottom portions of the grooves in the S-K mode, so that InAs islands that are separated mutually are formed. Then, quantum dots are formed by covering the InAs islands with i-type GaAs. In this manner, a periodic structure of the quantum dots is formed by using the grooves.
    Type: Grant
    Filed: August 21, 2003
    Date of Patent: March 15, 2005
    Assignee: Fujitsu Limited
    Inventor: Nobuaki Hatori
  • Publication number: 20040038440
    Abstract: An AlGaAs cladding layer is formed on a GaAs semiconductor substrate, and then an i-type GaAs layer is formed thereon. Then, stripe-like grooves are formed in the GaAs layer by the photolithography method, and then an InAs layer is formed by the MBE method. At this time, edges of convex portions are deformed to be gentle with a rise of a substrate temperature, and thus flat portions are almost eliminated. Then, InAs is hardly deposited on slant surfaces of the convex portions and the InAs is grown on the bottom portions of the grooves in the S-K mode, so that InAs islands that are separated mutually are formed. Then, quantum dots are formed by covering the InAs islands with i-type GaAs. In this manner, a periodic structure of the quantum dots is formed by using the grooves.
    Type: Application
    Filed: August 21, 2003
    Publication date: February 26, 2004
    Applicant: FUJITSU LIMITED
    Inventor: Nobuaki Hatori
  • Patent number: 6628691
    Abstract: A laser diode includes: a substrate having a first conductive type; a first cladding layer having a first conductive type and formed on the substrate; an active layer including a plurality of quantum dots and formed on the first cladding layer; a diffraction grating having a Bragg wavelength of &lgr;g and formed on the active layer; a second cladding layer having a second conductive type and formed on the active layer; a first electrode for injecting carriers having a first polarity into the active layer via the substrate; and a second electrode for injecting carriers having a second polarity into the active layer via the second cladding layer. The diffraction grating has a pitch satisfies the equation: &Dgr;E≦1.1&Ggr;, where &Ggr; is the full width at half maximum (FWHM) of the gain spectrum of the active layer and &Dgr;E is an amount of shift of an energy corresponding to the Bragg wavelength &lgr;g from the center wavelength energy of the gain spectrum.
    Type: Grant
    Filed: May 15, 2001
    Date of Patent: September 30, 2003
    Assignee: Fujitsu Limited
    Inventor: Nobuaki Hatori
  • Publication number: 20020085605
    Abstract: A laser diode includes: a substrate having a first conductive type; a first cladding layer having a first conductive type and formed on the substrate; an active layer including a plurality of quantum dots and formed on the first cladding layer; a diffraction grating having a Bragg wavelength of &lgr;g and formed on the active layer; a second cladding layer having a second conductive type and formed on the active layer; a first electrode for injecting carriers having a first polarity into the active layer via the substrate; and a second electrode for injecting carriers having a second polarity into the active layer via the second cladding layer. The diffraction grating has a pitch satisfies the equation: &Dgr;E≦1.1&Ggr;, where &Ggr;is the full width at half maximum (FWHM) of the gain spectrum of the active layer and &Dgr;E is an amount of shift of an energy corresponding to the Bragg wavelength &lgr;g from the center wavelength energy of the gain spectrum.
    Type: Application
    Filed: May 15, 2001
    Publication date: July 4, 2002
    Applicant: Fujitsu Limited
    Inventor: Nobuaki Hatori