Abstract: A pressure sensor has a stem in which a pressure introduction hole into which a pressure medium is introduced and a diaphragm deformable according to the pressure of the pressure medium are formed, and a strain detecting element which is arranged on the diaphragm via an insulating film and being configured to output a detection signal according to the deformation of the diaphragm. The strain detecting element is configured to have a portion made of polysilicon. A low doping layer having a higher electrical resistivity than polysilicon and a higher crystallinity than the insulating film is arranged between the insulating film and the strain detecting element.

Abstract: An optical fiber temperature distribution measuring device includes: an optical fiber as a sensor; a calculation control unit for measuring a temperature distribution along the optical fiber based on an intensity ratio between Stokes light and anti-Stokes light of backward Raman scattered light from the optical fiber; and a temperature correction unit for correcting the temperature distribution by using temperature dependence of a loss difference between the Stokes light and the anti-Stokes light.

Abstract: An optical fiber temperature distribution measuring device includes: an optical fiber as a sensor; a calculation control unit for measuring a temperature distribution along the optical fiber based on an intensity ratio between Stokes light and anti-Stokes light of backward Raman scattered light from the optical fiber; and a temperature correction unit for correcting the temperature distribution by using temperature dependence of a loss difference between the Stokes light and the anti-Stokes light.

Abstract: The invention provides a structure that does not employ complicated and large-scale control circuits or control memory, minimizes the circuits for real time processing, and allows the use of refresh memory. The invention provides a test clock (8-1) comprising a data processing apparatus (1-1) provided for each electrode pin of the measured device (11), a memory (2-1) that carries out reading and writing of the test pattern data and the like, a first-in-first-out element (4-1) that executes queue processing of the data read out from the memory, a delay circuit (5-1) that delays the output signal of the first-in-first-out element, and a measured device driver (6-1) that inputs into the electrode pin the output signal of the delay circuit, and in which the data processing apparatus (1-1) of adjacent test blocks are connected into a loop via the input-output circuit (3-1).

Abstract: An electro-optic sampling apparatus is provided to enable measurement on potentials of signals on the conductor of coaxial cable with high precision and with ease. Herein, an electric input connector inputs a measured electric signal, which is introduced to a conductive path such as a microstrip line. An electro-optic material (e.g., Bi12SiO20) that provides electro-optic effect such as Pockel's effect is fixed to a bare portion of the conductive path and is varied in birefringence ratio in response to strength of electric field caused by the conductive path through which the measured electric signal transmits. The conductive path is then terminated by a terminal device. Now, a laser beam is radiated toward the electro-optic material, wherein it is varied in polarization in response to variations of the birefringence ratio. Then, the laser beam is reflected by a dielectric mirror and is separated into two beams by a polarization beam splitter.

Abstract: The present invention allows reducing the power consumption, reducing the amount of heat generation, improving the frequency characteristics, and reducing noise superposition. A control circuit 25 supplies to a control circuit 5 a control signal CS 1 that indicates the setting voltage of a DUT 9 as a control signal CS 8. In addition, the control circuit 25 controls switching power sources 21 and 22 and the polarity control circuits 23 and 24 depending on control signals CS 4 to CS 7 such that the voltage drop amount of the control elements 6 and 7 becomes a value sufficient to operate the control elements 6 and 7 based on a control signal CS 1 and a detected signal DS2 that is fed back from the DUT 9. The control circuit 5 controls the control elements 6 and 7 depending on the control signal CS 8.

Abstract: An electro-optic sampling oscilloscope (or EOS oscilloscope) uses an electro-optic probe containing an electro-optic crystal, which is placed under effect of an electric field caused by a measured signal. Laser pulses are supplied to the electro-optic crystal wherein they are subjected to polarization. Then, measurement data representative of a waveform of the measured signal are produced in response to polarization states of the laser pulses and are stored in a measurement data storage. A user can select specific measurement data by using a list of files of multiple measurement data which is displayed on a screen. Then, the EOS oscilloscope displays an outline waveform which is created based on a reduced number of sample points extracted from the selected measurement data. Comments and/or measurement conditions can be stored in the measurement data storage in relation to the measurement data, so that they are adequately displayed on the screen.

Abstract: A semiconductor testing apparatus capable of displaying its measurement results in an easily understandable manner is provided. The apparatus comprises a display section for displaying a measurement result of a change in time of a voltage distribution on a measurement plane of a measured device and an input section for entering parameters for the display of the measurement result. When a measurement time is entered as a parameter, the display section displays the measurement result by means of a three-dimensional graph and a representation in numerals, letters or symbols of the measurement time. The graph shows along its three axes a first coordinate in a first direction on the measurement plane, a second coordinate in a second direction which is perpendicular to the first direction, and a voltage at the measurement time at a position on the measurement plane defined by the first and second coordinates.

Abstract: A multi-branch optical network testing method (or device) is provided to perform a fault isolation test on an optical network that branches off at a branch point by a number of optical lines having terminal ends respectively. Herein, optical pulses are input to the optical network, from which they are returned as reflection beams. Then, response beams corresponding to mixture of the reflection beams are converted to OTDR waveform data representing a waveform whose optical power gradually decreases in accordance with a distance from an OTDR measurement device and which has a number of reflection peaks. The OTDR waveform data are subjected to logarithmic conversion to produce logarithmic waveform data representing a logarithmic waveform. An approximation method of least squares is effected on the logarithmic waveform data to produce an approximation line, which crosses the logarithmic waveform at points of intersection corresponding to Fresnel reflection points.

Abstract: Pins of an integrated circuit are provided with timing axis signals for testing in the time axis without discrepancies. An electro-optic probe in proximity to a plurality of contact points of a device under test uses positions of equal distance or a pre-set distance as skew measurement points, and detects timing axis signals on each microstrip line, A phase detector detects the phase of the timing axis signals that the electro-optic probe detects, and a phase difference calculator finds the phase difference between the phase detected by the phase detector and a reference value. Phase control of the timing axis signals is carried out by a phase controller so as to cancel the obtained phase difference.

Abstract: In the present invention, measuring the one-dimensional or two-dimensional voltage distribution or electrical field distribution in a measured device is made possible, and a reduction in the measuring time can be implemented.

Abstract: The apparatus for inspecting integrated circuits according to the present invention comprises: a test signal generating device that outputs an optical test signal; an optical distributor that distributes the optical test signal into a plurality of distributed optical signals by transmitting the optical test signal through a branching optical fiber network; and a plurality of pin cards each of which generates an electric test signal by performing phase adjustment of each distributed optical signal. The pin cards are arranged so as to apply the electrical test signals to pins of an integrated circuit to be inspected.

Abstract: In a light receiving circuit for use in electro-optic sampling oscilloscope which receives first and second optical, photodiodes 51 and 52 are connected in series between a positive bias power supply 50P and a negative bias power supply 50N. The photodiodes 51 and 52 receive optical signals whose polarization state correspond to the voltage of a signal to be measured and convert the thus-received optical signals into electric signals. An amplifier 53 amplifies an electric current appearing in a point of connection P between the photodiodes 51 and 52. A current monitor 54 detects the electric signal converted by the photodiode 51, and a current monitor 57 detects the electric signal converted by the photodiode 52. The electric signal detected by the current monitor 54 is subjected to analog-to-digital conversion by an analog-to-digital converter 55, and the electric signal detected by the current monitor 57 is subjected to analog-to-digital conversion by an analog-to-digital converter 58.

Abstract: The present invention relates to an electro-optic sampling oscilloscope. The delay circuit in the electro-optic sampling oscilloscope comprises a delay time detecting circuit, a regulation time determining circuit, a counter circuit and a delay regulating circuit. The delay time detecting circuit detects in the trigger signal a value corresponding to the delay time of a reference clock from a reference clock generating circuit. The regulation time determining circuit determines a regulation time based on the value detected by the delay time detecting circuit so that the regulation time is an integer multiple of the reference clock. The counter circuit is triggered by the trigger signal to count the reference clock through a specific value. The delay regulating circuit employs a signal related to the regulation time from the regulation time determining circuit, to delay the signal output from the counter circuit by the regulation time.

Abstract: The present invention allows reducing the power consumption, reducing the amount of heat generation, improving the frequency characteristics, and reducing noise superposition. A control circuit 25 supplies to a control circuit 5 a control signal CS 1 that indicates the setting voltage of a DUT 9 as a control signal CS 8. In addition, the control circuit 25 controls switching power sources 21 and 22 and the polarity control circuits 23 and 24 depending on control signals CS 4 to CS 7 such that the voltage drop amount of the control elements 6 and 7 becomes a value sufficient to operate the control elements 6 and 7 based on a control signal CS 1 and a detected signal DS2 that is fed back from the DUT 9. The control circuit 5 controls the control elements 6 and 7 depending on the control signal CS 8.

Abstract: The invention provides a structure that does not employ complicated and large-scale control circuits or control memory, minimizes the circuits for real time processing, and allows the use of refresh memory. The invention provides a test clock 8-1 comprising a data processing apparatus 1-1 provided for each electrode pin of the measured device 11, a memory 2-1 that carries out reading and writing of the test pattern data and the like, a first-in-first-out element 4-1 that executes queue processing of the data read out from the memory, a delay circuit 5-1 that delays the output signal of the first-in-first-out element, and a measured device driver 6-1 that inputs into the electrode pin the output signal of the delay circuit, and in which the data processing apparatus 1-1 of adjacent test blocks are connected into a loop via the input-output circuit 3-1.

Abstract: A semiconductor testing apparatus capable of displaying its measurement results in an easily understandable manner is provided. The apparatus comprises a display section for displaying a measurement result of a change in time of a voltage distribution on a measurement plane of a measured device and an input section for entering parameters for the display of the measurement result. When a measurement time is entered as a parameter, the display section displays the measurement result by means of a three-dimensional graph and a representation in numerals, letters or symbols of the measurement time. The graph shows along its three axes a first coordinate in a first direction on the measurement plane, a second coordinate in a second direction which is perpendicular to the first direction, and a voltage at the measurement time at a position on the measurement plane defined by the first and second coordinates.

Abstract: The method for calibrating a semiconductor testing device, comprises the steps of: changing a beam emitted from a light source into a linear beam; sending the linear beam through an electro optic element provided above a target device onto a measuring line on the target device; detecting a variation in polarization of the beam reflected from the measuring line; calculating an electric field distribution or a voltage distribution on the measuring line of the target device based on the variation in polarization; and moving a calibrating device, which produces an electric field from a predetermined point, to specify a measurable point or range.