Patents by Inventor Nobuhiko Sawaki
Nobuhiko Sawaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8338853Abstract: Light emitters and substrates for light emitters are provided to improve light-emitting efficiency and achieve improvement in crystal quality. A light emitter includes a single-crystal substrate, an oriented microcrystal layer, and a light-emitting layer. The light-emitting layer is made of a nitride semiconductor by means of a vapor-phase growth method. In the oriented microcrystal layer, the proportion of crystals, in which one of crystal axes is oriented with respect to the single-crystal substrate, is 5-9 out of 10 crystals. An average diameter of the crystal grains of the respective crystals, contained in the oriented microcrystal layer, is 1-1,000 nm. A light emitter may be equipped with an intermediate layer, a light-emitting layer, and a clad layer. These layers are formed on the oriented microcrystal layer by a vapor-phase growth method. The light-emitting layer contains microcrystal grains whose average grain diameter is 1-1,000 nm.Type: GrantFiled: August 24, 2006Date of Patent: December 25, 2012Assignee: Toyota Jidosha Kabushiki KaishaInventors: Akira Kiyama, Rentaro Mori, Hiroya Inaoka, Masayuki Ichiyanagi, Nobuhiko Sawaki, Yoshio Honda, Yasuyuki Yanase
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Publication number: 20090250711Abstract: To also intend the improvement of light-emitting efficiency by microcrystallizing light-emitting layer while utilizing vapor-phase growth method that is advantageous for improving crystal quality, and the like. 4 for forming light-emitting layer comprises a substrate single-crystal substrate 1, and an oriented fine crystal layer 3 being formed on the single-crystal substrate 4. One of the crystal axes of respective crystals, which constitute the oriented microcrystal layer 3, is oriented in a specific direction with respect to the single-crystal substrate 1, and an average of the crystal grain diameters of the respective crystals, which constitute the oriented microcrystal layer 3, is adapted to being 1-1,000 nm.Type: ApplicationFiled: August 24, 2006Publication date: October 8, 2009Inventors: Akira Kiyama, Rentaro Mori, Hiroya Inaoka, Masayuki Ichiyanagi, Nobuhiko Sawaki, Yoshio Honda, Yasuyuki Yanase
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Publication number: 20050245054Abstract: A mask with rectangular openings is formed on a large-scaled silicon substrate, and an AlN micro crystalline layer is formed in a thickness of 200 nm or over through the mask on the silicon substrate by means of selective and lateral growth. Then, a nitride semiconductor crystal layer with a composition of InxGayAlzN (0?x, y, z?1, x+y+z=1) is formed on the AlN micro crystalline layer.Type: ApplicationFiled: October 28, 2004Publication date: November 3, 2005Applicant: NATIONAL UNIVERSITY CORPORATION NAGOYA UNIVERSITYInventors: Nobuhiko Sawaki, Yoshio Honda, Yoshiyuki Nishimura
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Patent number: 6927423Abstract: A mask layer with an opening is formed on a main surface of a silicon substrate, which is exposed in the opening. Then, a hexagonal pyramidal island-shaped portion is formed from a first semiconductor nitride in the opening to complete a semiconductor element structure.Type: GrantFiled: May 23, 2003Date of Patent: August 9, 2005Assignee: Nagoya UniversityInventors: Nobuhiko Sawaki, Yoshio Honda
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Patent number: 6888867Abstract: A semiconductor laser device includes a substrate and an n-GaN layer composed of a nitride semiconductor formed on the substrate. The substrate includes a trench having as a slope a plane inclined 62 degrees from the main plane of the substrate, or a plane inclined within 3 degrees in an arbitrary direction from the inclined plane. The n-GaN layer is formed on the slope. On the n-GaN layer are formed a lower clad layer, an active layer, and an upper clad layer, each composed of a nitride semiconductor. The active layer has a plane orientation substantially matching the plane orientation of the main plane.Type: GrantFiled: March 26, 2002Date of Patent: May 3, 2005Assignees: Sharp Kabushiki KaishaInventors: Nobuhiko Sawaki, Yoshio Honda, Norifumi Kameshiro, Masahito Yamaguchi, Norikatsu Koide, Shigetoshi Ito, Tomoki Ono, Katsuki Furukawa
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Patent number: 6844572Abstract: A light emitting semiconductor device includes a silicon substrate and a compound semiconductor layer disposed on a main plane of the silicon substrate and represented by a general expression InxGayAlzN, wherein x+y+z=1, 0?x?1, 0?y?1, and 0?z?1. The silicon substrate has a groove having an oblique plane corresponding to a plane inclined relative to the substrate's main plane by 62 degrees or a plane inclined relative to the inclined plane in any direction within three degrees, and on the oblique plane a plurality or quantum well layers different in thickness are stacked.Type: GrantFiled: March 18, 2003Date of Patent: January 18, 2005Assignees: Sharp Kabushiki Kaisha, Nobuhiko SwakiInventors: Nobuhiko Sawaki, Norikatsu Koide, Kensaku Yamamoto
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Patent number: 6806115Abstract: A method for producing a semiconductor light emitting device includes the steps of forming a mask layer having a plurality of openings on a surface of a silicon substrate; and forming a column-like multi-layer structure including a light emitting layer in each of the plurality of openings with nitride semiconductor materials. A width between two adjacent openings of the plurality of openings of the mask layer is 10 &mgr;m or less.Type: GrantFiled: October 30, 2002Date of Patent: October 19, 2004Assignees: Sharp Kabushiki KaishaInventors: Norikatsu Koide, Junji Yamamoto, Tsuyoshi Dohkita, Nobuhiko Sawaki, Yoshio Honda, Yousuke Kuroiwa, Masahito Yamaguchi
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Publication number: 20040061125Abstract: A mask layer with an opening is formed on a main surface of a silicon substrate, which is exposed in the opening. Then, a hexagonal pyramidal island-shaped portion is formed from a first semiconductor nitride in the opening to complete a semiconductor element structure.Type: ApplicationFiled: May 23, 2003Publication date: April 1, 2004Applicant: NAGOYA UNIVERSITYInventors: Nobuhiko Sawaki, Yoshio Honda
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Patent number: 6635901Abstract: A semiconductor device includes a silicon substrate and a compound semiconductor layer formed on a main plane of the silicon substrate. The compound semiconductor layer is represented by the general formula of InxGayAlzN (where x+y+z=1, 0≦x≦1, 0≦y≦1, 0≦z≦1). The silicon substrate includes a trench having as a slope a plane inclined 62 degrees from the main plane of the silicon substrate, or a plane inclined in a range within 3 degrees in an arbitrary direction from the inclined plane. The compound semiconductor layer is formed on the slope. The semiconductor device includes compound semiconductor layers represented by AlxGayInzN (where x+y+z=1, 0≦x≦1, 0≦y≦1, 0≦z≦1) on a silicon substrate. The silicon substrate has a main plane constituted by a plane in a range of ±5 degrees in an arbitrary direction from a (112) plane. The compound semiconductor layers are formed on the main plane.Type: GrantFiled: December 12, 2001Date of Patent: October 21, 2003Assignees: Sharp Kabushiki KaishaInventors: Nobuhiko Sawaki, Yoshio Honda, Norikatsu Koide, Katsuki Furukawa
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Publication number: 20030178702Abstract: A light emitting semiconductor device includes a silicon substrate and a compound semiconductor layer disposed on a main plane of the silicon substrate and represented by a general expression InxGayAlzN, wherein x+y+z=1, 0≦x≦1, 0≦y≦1, and 0≦z≦1. The silicon substrate has a groove having an oblique plane corresponding to a plane inclined relative to the substrate's main plane by 62 degrees or a plane inclined relative to the inclined plane in any direction within three degrees, and on the oblique plane a plurality or quantum well layers different in thickness are stacked.Type: ApplicationFiled: March 18, 2003Publication date: September 25, 2003Inventors: Nobuhiko Sawaki, Norikatsu Koide, Kensaku Yamamoto
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Publication number: 20030087462Abstract: A method for producing a semiconductor light emitting device includes the steps of forming a mask layer having a plurality of openings on a surface of a silicon substrate; and forming a column-like multi-layer structure including a light emitting layer in each of the plurality of openings with nitride semiconductor materials. A width between two adjacent openings of the plurality of openings of the mask layer is 10 &mgr;m or less.Type: ApplicationFiled: October 30, 2002Publication date: May 8, 2003Inventors: Norikatsu Koide, Junji Yamamoto, Tsuyoshi Dohkita, Nobuhiko Sawaki, Yoshio Honda, Yousuke Kuroiwa, Masahito Yamaguchi
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Publication number: 20030031219Abstract: A semiconductor laser device includes a substrate and an n-GaN layer composed of a nitride semiconductor formed on the substrate. The substrate includes a trench having as a slope a plane inclined 62 degrees from the main plane of the substrate, or a plane inclined within 3 degrees in an arbitrary direction from the inclined plane. The n-GaN layer is formed on the slope. On the n-GaN layer are formed a lower clad layer, an active layer, and an upper clad layer, each composed of a nitride semiconductor. The active layer has a plane orientation substantially matching the plane orientation of the main plane.Type: ApplicationFiled: March 26, 2002Publication date: February 13, 2003Inventors: Nobuhiko Sawaki, Yoshio Honda, Norifumi Kameshiro, Masahito Yamaguchi, Norikatsu Koide, Shigetoshi Ito, Tomoki Ono, Katsuki Furukawa
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Publication number: 20020074561Abstract: A semiconductor device includes a silicon substrate and a compound semiconductor layer formed on a main plane of the silicon substrate. The compound semiconductor layer is represented by the general formula of InxGayAlzN (where x+y+z=1, 0≦x≦1, 0≧y≧1, 0≦z≦1). The silicon substrate includes a trench having as a slope a plane inclined 62 degrees from the main plane of the silicon substrate, or a plane inclined in a range within 3 degrees in an arbitrary direction from the inclined plane. The compound semiconductor layer is formed on the slope. The semiconductor device includes compound semiconductor layers represented by AlxGayInzN (where x+y+z=1, 0≦x≦1, 0≦y≦1, 0≦z≦1) on a silicon substrate. The silicon substrate has a main plane constituted by a plane in a range of ±5 degrees in an arbitrary direction from a (112) plane. The compound semiconductor layers are formed on the main plane.Type: ApplicationFiled: December 12, 2001Publication date: June 20, 2002Inventors: Nobuhiko Sawaki, Yoshio Honda, Norikatsu Koide, Katsuki Furukawa
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Patent number: 6225650Abstract: A GaN group crystal base member comprising a base substrate, a mask layer partially covering the surface of said base substrate to give a masked region, and a GaN group crystal layer grown thereon to cover the mask layer, which is partially in direct contact with the non-masked region of the base substrate, use thereof for a semiconductor element, manufacturing methods thereof and a method for controlling a dislocation line. The manufacturing method of the present invention is capable of making a part in the GaN group crystal layer, which is above a masked region or non-masked region, have a low dislocation density.Type: GrantFiled: March 24, 1998Date of Patent: May 1, 2001Assignee: Mitsubishi Cable Industries, Ltd.Inventors: Kazuyuki Tadatomo, Hiroaki Okagawa, Youichiro Ohuchi, Keiji Miyashita, Kazumasa Hiramatsu, Nobuhiko Sawaki, Katsunori Yahashi, Takumi Shibata
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Patent number: 4855249Abstract: In organometallic vapor phase hetero-epitaxial processes for growing Al.sub.x Ga.sub.1-x N films on a sapphire substrate, the substrate is subjected to a preheat treatment of brief duration, such as less than 2 minutes, at relatively low temperatures in an atmosphere comprising Al-containing organometallic compound, NH.sub.3 and H.sub.2 gases, prior to the hetero epitaxial growth of Al.sub.x Ga.sub.1-x N films. Thus, single crystalline Al.sub.x Ga.sub.1-x N layers of high uniformity and high quality having smooth, flat surfaces are provided. Multi-layers grown according to the process of the invention are free from cracks and have preferable UV or blue light emission properties.Type: GrantFiled: March 16, 1988Date of Patent: August 8, 1989Assignee: Nagoya UniversityInventors: Isamu Akasaki, Nobuhiko Sawaki
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Patent number: 4816878Abstract: A semiconductor device having a superlattice structure, which comprises at least one unit structure including first and third semiconductor layers as quantum well layers, and a second semiconductor layer as a barrier layer, which are arranged alternately on each other is described. The first semiconductor layer has a higher impurity concentration than the third semiconductor layer and has a quantum energy level determined by its thickness. The third semiconductor layer is of a thickness having quantum energy levels, one of which is lower than that of the first semiconductor layer and the second of which is equal to or higher than that of the first semiconductor layer. The second semiconductor layer is of a thickness which allows electrons existing at the second quantum energy level of the third semiconductor layer to transfer easily from the third to the first semiconductor layer.Type: GrantFiled: November 13, 1986Date of Patent: March 28, 1989Assignee: Kabushiki Kaisha Toyota Chuo KenkyushoInventors: Hiroyuki Kano, Masafumi Hashimoto, Nobuhiko Sawaki