Patents by Inventor Nobuhiro Minami
Nobuhiro Minami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9552619Abstract: An image processing apparatus includes a plurality of image processing module parts, a module arbiter part, and a DMAC (Direct Memory Access Controller) part. Each of the image processing module parts includes a module core for executing a predetermined image processing. The plurality of image processing module parts is connected to the module arbiter part. The module arbiter part arbitrates memory access which is given by the plurality of image processing module parts through a bus. The DMAC part is connected between the module arbiter part and the bus, and executes memory access related to the arbitration result obtained by the module arbiter part.Type: GrantFiled: April 1, 2013Date of Patent: January 24, 2017Assignees: MegaChips Corporation, Nikon CorporationInventors: Shogo Iwai, Kazuma Takahashi, Nobuhiro Minami, Kensuke Uchida, Toru Miyakoshi
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Patent number: 8743132Abstract: A setting control apparatus includes a setting control part, a special register, and a read-out control part. The setting control part makes stored in a temporary storage part a control value used in a processing circuit, in response to an input of the control value. The special register is electrically connected to the processing circuit and serving as a storage element capable of storing the control value. The read-out control part controls a read-out operation for reading out the control value from the temporary storage part into the special register. The read-out control part performs the read-out operation at a predetermined timing after storing of the control value in the temporary storage part is completed.Type: GrantFiled: December 14, 2010Date of Patent: June 3, 2014Assignee: MegaChips CorporationInventor: Nobuhiro Minami
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Publication number: 20140043343Abstract: An image processing apparatus includes a plurality of image processing module parts, a module arbiter part, and a DMAC (Direct Memory Access Controller) part. Each of the image processing module parts includes a module core for executing a predetermined image processing. The plurality of image processing module parts is connected to the module arbiter part. The module arbiter part arbitrates memory access which is given by the plurality of image processing module parts through a bus. The DMAC part is connected between the module arbiter part and the bus, and executes memory access related to the arbitration result obtained by the module arbiter part.Type: ApplicationFiled: April 1, 2013Publication date: February 13, 2014Applicants: Nikon Corporation, MegaChips CorporationInventors: Shogo IWAI, Kazuma TAKAHASHI, Nobuhiro MINAMI, Kensuke UCHIDA, Toru MIYAKOSHI
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Patent number: 8369634Abstract: A sorting unit sorts a plurality of data sets of HP component having been processed by a decoding unit, selectively employing one of a first table corresponding to a first orientation of prediction and a second table corresponding to a second orientation of prediction in accordance with an orientation of prediction of HP component. The sorting unit includes an inverse prediction unit performing inverse prediction on data of LP component inputted from the decoding unit, a processing unit obtaining an orientation of prediction of HP component, based on the data of LP component after inverse prediction by the inverse prediction unit, and a selecting unit selecting one of the first and second tables, based on the orientation of prediction of HP component obtained by the processing unit.Type: GrantFiled: October 2, 2009Date of Patent: February 5, 2013Assignee: MegaChips CorporationInventors: Nobuhiro Minami, Yujiro Tani, Yusuke Mizuno, Hideki Daian, Masahiro Moriyama, Hiromu Hasegawa
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Patent number: 8160376Abstract: An image compression apparatus performs quantization of DC component data, low-pass component data and high-pass component data which are generated by frequency conversion of still image data. An extracting part extracts additional data and coding object data which is to be entropy coded, from quantization data. An entropy coding part performs entropy coding of the coding object data stored in a coding object data memory. An additional data processing part generates a flex bit from the additional data. A pattern information generation part acquires the coding object data directly from the extracting part, to generate pattern information indicating whether the coding object data is zero or not. A bit stream generation part outputs the pattern information, the coding object data and the flex bit in a predetermined order, to output a bit stream.Type: GrantFiled: March 23, 2009Date of Patent: April 17, 2012Assignee: MegaChips CorporationInventors: Masahiro Moriyama, Yujiro Tani, Yusuke Mizuno, Hideki Daian, Nobuhiro Minami, Hiromu Hasegawa
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Patent number: 8160377Abstract: A symbol generation part serially inputs a data string of quantization data. If quantization data of non-zero coefficient is inputted, respective information on an absolute value, a zero run and a sign of the non-zero coefficient are stored in registers. When quantization data of the next non-zero coefficient is inputted, the respective information on the absolute value, the zero run and the sign stored in the registers are updated. At that time, the contents of the registers which have been stored immediately before the input are outputted as symbol data of the immediately preceding non-zero coefficient.Type: GrantFiled: March 23, 2009Date of Patent: April 17, 2012Assignee: MegaChips CorporationInventors: Yujiro Tani, Yusuke Mizuno, Hideki Daian, Nobuhiro Minami, Masahiro Moriyama, Hiromu Hasegawa
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Patent number: 8107746Abstract: A decoding unit includes a first processing unit including ND decoding units and decoding a group of Normal Data, a second processing unit decoding a group of Flex Bits, and a selector. The ND decoding units perform decoding of the group of Normal Data, stepwise varying a start position of decoding in the data stream, concurrently with decoding of the group of Flex Bits by the second processing unit. The selector selects one ND decoding unit with a start position of decoding being set at a position immediately following an end position of the group of Flex Bits, from the ND decoding units, based on a result of decoding of the group of Flex Bits.Type: GrantFiled: March 17, 2009Date of Patent: January 31, 2012Assignee: MegaChips CorporationInventors: Hideki Daian, Yujiro Tani, Yusuke Mizuno, Nobuhiro Minami, Masahiro Moriyama, Hiromu Hasegawa
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Publication number: 20110161574Abstract: A setting control apparatus includes a setting control part, a special register, and a read-out control part. The setting control part makes stored in a temporary storage part a control value used in a processing circuit, in response to an input of the control value. The special register is electrically connected to the processing circuit and serving as a storage element capable of storing the control value. The read-out control part controls a read-out operation for reading out the control value from the temporary storage part into the special register. The read-out control part performs the read-out operation at a predetermined timing after storing of the control value in the temporary storage part is completed.Type: ApplicationFiled: December 14, 2010Publication date: June 30, 2011Applicant: MEGACHIPS CORPORATIONInventor: Nobuhiro MINAMI
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Publication number: 20100128999Abstract: A symbol generation part serially inputs a data string of quantization data. If quantization data of non-zero coefficient is inputted, respective information on an absolute value, a zero run and a sign of the non-zero coefficient are stored in registers. When quantization data of the next non-zero coefficient is inputted, the respective information on the absolute value, the zero run and the sign stored in the registers are updated. At that time, the contents of the registers which have been stored immediately before the input are outputted as symbol data of the immediately preceding non-zero coefficient.Type: ApplicationFiled: March 23, 2009Publication date: May 27, 2010Applicant: MegaChips CorporationInventors: Yujiro TANI, Yusuke Mizuno, Hideki Daian, Nobuhiro Minami, Masahiro Moriyama, Hiromu Hasegawa
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Publication number: 20100111430Abstract: A sorting unit sorts a plurality of data sets of HP component having been processed by a decoding unit, selectively employing one of a first table corresponding to a first orientation of prediction and a second table corresponding to a second orientation of prediction in accordance with an orientation of prediction of HP component. The sorting unit includes an inverse prediction unit performing inverse prediction on data of LP component inputted from the decoding unit, a processing unit obtaining an orientation of prediction of HP component, based on the data of LP component after inverse prediction by the inverse prediction unit, and a selecting unit selecting one of the first and second tables, based on the orientation of prediction of HP component obtained by the processing unit.Type: ApplicationFiled: October 2, 2009Publication date: May 6, 2010Applicant: MegaChips CorporationInventors: Nobuhiro MINAMI, Yujiro Tani, Yusuke Mizuno, Hideki Daian, Masahiro Moriyama, Hiromu Hasegawa
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Publication number: 20100104206Abstract: An image compression apparatus performs quantization of DC component data, low-pass component data and high-pass component data which are generated by frequency conversion of still image data. An extracting part extracts additional data and coding object data which is to be entropy coded, from quantization data. An entropy coding part performs entropy coding of the coding object data stored in a coding object data memory. An additional data processing part generates a flex bit from the additional data. A pattern information generation part acquires the coding object data directly from the extracting part, to generate pattern information indicating whether the coding object data is zero or not. A bit stream generation part outputs the pattern information, the coding object data and the flex bit in a predetermined order, to output a bit stream.Type: ApplicationFiled: March 23, 2009Publication date: April 29, 2010Applicant: MegaChips CorporationInventors: Masahiro Moriyama, Yujiro Tani, Yusuke Mizuno, Hideki Daian, Nobuhiro Minami, Hiromu Hasegawa
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Publication number: 20100086223Abstract: A decoding unit includes a first processing unit including ND decoding units and decoding a group of Normal Data, a second processing unit decoding a group of Flex Bits, and a selector. The ND decoding units perform decoding of the group of Normal Data, stepwise varying a start position of decoding in the data stream, concurrently with decoding of the group of Flex Bits by the second processing unit. The selector selects one ND decoding unit with a start position of decoding being set at a position immediately following an end position of the group of Flex Bits, from the ND decoding units, based on a result of decoding of the group of Flex Bits.Type: ApplicationFiled: March 17, 2009Publication date: April 8, 2010Applicant: MegaChips CorporationInventors: Hideki DAIAN, Yujiro Tani, Yusuke Mizuno, Nobuhiro Minami, Masahiro Moriyama, Hiromu Hasegawa
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Patent number: 7616809Abstract: Color-difference signals that become unnecessary after rotation are deleted from a second pixel while saving color-difference signals that become necessary after rotation in the second pixel, to thereby form image data conforming to YUV422 format. The image data is then rotated, and subsequently the color-difference signals saved in the second pixel are returned to the original first pixel, to thereby form image data conforming to YUV422 format.Type: GrantFiled: August 4, 2006Date of Patent: November 10, 2009Assignee: MegaChips LSI Solutions Inc.Inventors: Takashi Matsutani, Satoru Kubota, Nobuhiro Minami
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Patent number: 7570288Abstract: A pixel signal of Bayer pattern output from an imaging device is subjected to interpolation in a pixel interpolation circuit, and converted into a YCbCr signal in a color space conversion circuit. A chroma value calculation circuit calculates a chroma value based on the pixel signal output from the imaging device. A look-up table converts the chroma value into a suppression signal. More specifically, when the chroma value is lower than a threshold value, the look-up table outputs a value lower than 1 as the suppression signal. The suppression signal is corrected in another look-up table, and then, works on Cr and Cb signals in multipliers. A signal in a low-chroma region is thereby suppressed.Type: GrantFiled: March 28, 2006Date of Patent: August 4, 2009Assignee: MegaChips LSI Solutions Inc.Inventors: Hiromu Hasegawa, Munehiro Mori, Nobuhiro Minami
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Patent number: 7539352Abstract: A first pixel group containing a pixel of interest, a second pixel group containing the first pixel group, and a third pixel group containing the second pixel group are defined. A first reference pixel value is calculated based on the first pixel group, and a second reference pixel value is calculated based on the third pixel group. The second pixel group is divided into two sub-groups with respect to the second reference pixel value. The sub-group containing the pixel of interest is selected as a target set. In the target set, a pixel with a pixel value close to the first reference pixel value is selected as a corrective pixel. The pixel value of the pixel of interest is replaced with the pixel value of the corrective pixel.Type: GrantFiled: December 27, 2005Date of Patent: May 26, 2009Assignee: MegaChips LSI Solutions Inc.Inventors: Hiromu Hasegawa, Munehiro Mori, Nobuhiro Minami
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Publication number: 20070248263Abstract: Color-difference signals that become unnecessary after rotation are deleted from a second pixel while saving color-difference signals that become necessary after rotation in the second pixel, to thereby form image data conforming to YUV422 format. The image data is then rotated, and subsequently the color-difference signals saved in the second pixel are returned to the original first pixel, to thereby form image data conforming to YUV422 format.Type: ApplicationFiled: August 4, 2006Publication date: October 25, 2007Applicant: MegaChips LSI Solutions Inc.Inventors: Takashi Matsutani, Satoru Kubota, Nobuhiro Minami
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Publication number: 20060262196Abstract: A pixel signal of Bayer pattern output from an imaging device is subjected to interpolation in a pixel interpolation circuit, and converted into a YCbCr signal in a color space conversion circuit. A chroma value calculation circuit calculates a chroma value based on the pixel signal output from the imaging device. A look-up table converts the chroma value into a suppression signal. More specifically, when the chroma value is lower than a threshold value, the look-up table outputs a value lower than 1 as the suppression signal. The suppression signal is corrected in another look-up table, and then, works on Cr and Cb signals in multipliers. A signal in a low-chroma region is thereby suppressed.Type: ApplicationFiled: March 28, 2006Publication date: November 23, 2006Applicant: MegaChips LSI Solutions Inc.Inventors: Hiromu HASEGAWA, Munehiro Mori, Nobuhiro Minami
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Publication number: 20060159361Abstract: A first pixel group containing a pixel of interest, a second pixel group containing the first pixel group, and a third pixel group containing the second pixel group are defined. A first reference pixel value is calculated based on the first pixel group, and a second reference pixel value is calculated based on the third pixel group. The second pixel group is divided into two sub-groups with respect to the second reference pixel value. The sub-group containing the pixel of interest is selected as a target set. In the target set, a pixel with a pixel value close to the first reference pixel value is selected as a corrective pixel. The pixel value of the pixel of interest is replaced with the pixel value of the corrective pixel.Type: ApplicationFiled: December 27, 2005Publication date: July 20, 2006Applicant: MegaChips LSI Solutions Inc.Inventors: Hiromu Hasegawa, Munehiro Mori, Nobuhiro Minami
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Patent number: 6932937Abstract: Apparatus for manufacturing a molded article having a substrate material and skin material may include a first die that receives and supports the substrate material and a second die that receives and supports the skin material. The first die is arranged and constructed to engage the first die. A cutter may be provided on the first molding die. The cutter can be actuated when the second die moves toward the first die in order to partially cut away the substrate material.Type: GrantFiled: March 5, 2002Date of Patent: August 23, 2005Assignee: Araco Kabushiki KaishaInventors: Nobuhiro Minami, Tamotsu Nagaya
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Publication number: 20020125616Abstract: Apparatus for manufacturing a molded article having a substrate material and skin material may include a first die that receives and supports the substrate material and a second die that receives and supports the skin material. The first die is arranged and constructed to engage the first die. A cutter may be provided on the first molding die. The cutter can be actuated when the second die moves toward the first die in order to partially cut away the substrate material.Type: ApplicationFiled: March 5, 2002Publication date: September 12, 2002Inventors: Nobuhiro Minami, Tamotsu Nagaya