Abstract: A display device comprises horizontal video end position detection means for detecting a horizontal video end position of video data on the basis of a second threshold value and threshold value control means for controlling the second threshold value depending on the level of video data outputted from an analog-to-digital converter.

Abstract: Predetermined frequency components contained in a luminance signal are extracted by BPF (12a)-(12n), and amplified by limited amplifiers (16a)-(16n). As a result, an addition signal, including a luminance signal component amplified and suppressed and a noise component amplified, is obtained from an adder (20a). The luminance signal is also supplied through an HPF (14) and adjusted in level by an amplifier (18). Therefore, a noise component is obtained from a subtracter (20b) by subtracting an amplified signal from the addition signal by a subtracter (20b). A subtracter (20c) subtracts this noise component from the luminance signal supplied from a delay circuit (22a), thereby outputting a luminance signal reduced of noise through an output terminal (S2). Because the luminance signal is separated into a plurality of bands by the plurality of BPFs, there is no possibility of saturating in noise component by the limiters, thus fully removing noise.

Abstract: A display device comprises horizontal video end position detection means for detecting a horizontal video end position of video data on the basis of a second threshold value and threshold value control means for controlling the second threshold value depending on the level of video data outputted from an analog-to-digital converter.

Abstract: An apparatus for processing television signal including an A/D converter which converts a television signal (a luminance signal) into a digital television signal. A sampling circuit samples television signal data outputted from the A/D converter in response to a sampling clock outputted from a VCO included in a PLL, and outputs sampled data. An output of the A/D converter is also applied to a band elimination filter which outputs luminance signal data that a chrominance signal component is completely eliminated. The sampled data and the luminance signal data are compared with each other by a comparator, and an output of the comparator is applied to a low-pass filter included in the PLL during a burst period. An output of the low-pass filter becomes a control voltage signal for the VCO, whereby an oscillation frequency (phase) of the VCO is controlled.

Abstract: A high-impedance circuit includes a differential pair circuit composed of a first transistor and a second transistor, and a buffer circuit. The buffer circuit includes an NPN type transistor pair composed of a cascade connection of NPN type transistors and a PNP type transistor pair composed of a cascade connection of PNP type transistors, and bases of the NPN type transistors and bases of PNP type transistors respectively corresponding to the NPN type transistors are connected to each other, respectively so as to constitute current mirror circuits. An output of the differential pair circuit is connected to a cascade connection point of the NPN type transistor pair, and an emitter of an NPN type transistor included in the NPN type transistor pair is connected to the ground via a constant current source, and the emitter is connected to bases of the first transistor and the second transistor via resistors, respectively.

Abstract: A television circuit (10) according to the invention includes a multiplier (12), and a voltage signal (V1) is outputted from an LPF (22) in accordance with the presence or absence of a color burst signal which is to be inputted to the multiplier (12). A rectangular-wave signal (Va) is obtained on the basis of the voltage signal (V1) through a peak holding circuit (24) and a sampling/holding circuit (42). A rectangular-wave signal (Vc) is obtained by averaging the rectangular-wave signal (Va) and a rectangular-wave signal (Vb) which is obtained by delaying the signal (Va) by a 1H delay circuit (44) by an adder (46) and a 1/2 multiplication circuit (48). On the basis of the rectangular-wave signal (Vc), a voltage signal (V3) is produced by an LPF (52) having a relatively small time constant, which is compared with a reference voltage (Vref) by a level-comparator (54), whereby a signal is outputted. The signal is used as a color killer signal for a color killer circuit, for example.

Abstract: A filter circuit includes a differential amplifier having a mutual conductance of g.sub.m1, and a transistor T.sub.1 which attenuates an output current of the differential amplifier by 1/.beta. (.beta. is a current amplification factor) is arranged at a stage succeeding to the differential amplifier, whereby terms of g.sub.m1 in equations respectively representative of a resonance frequency .omega..sub.0 and a quality factor Q are multiplied by 1/.beta., respectively. Since the term of g.sub.m1 exists in a numerator within a root symbol (.sqroot. ) in the equation representative of the resonance frequency .omega..sub.0, by arranging the transistor T.sub.1, the resonance frequency .omega..sub.0 can be decreased by 1/.sqroot. .beta. times. Furthermore, since the term of g.sub.m1 exists in a denominator within a root symbol (.sqroot. ) in the equation representative of the quality factor Q, by arranging the transistor T.sub.1, the quality factor can be increased by .sqroot. .beta. times.

Abstract: A Y/C separation circuit includes a first adder by which a carrier-multiplexed composite video signal is produced by multiplexing a color sub-carrier signal which is in synchronization with a color burst signal on a composite video signal during a vertical blanking period. The carrier-multiplexed composite video signal inputted to a 1H delay line and outputted from the 1H delay line. The carrier-multiplexed composite video signals at the input and the output of the 1H delay line are inputted to a second adder, and a subtracter, respectively. A luminance signal component and a chrominance signal component are respectively outputted from the second adder and the subtracter.

Abstract: An apparatus for reducing noise in the high-frequency band is provided in the preceding stage of a limiter (8) with a high-frequency band correcting filter (12) for reducing a high-frequency band component of a reproduced RF signal from an optical disc. The reproduced RF signal has its high-frequency component lowered before entered into the limiter (18), reducing noise and beat components. As a result, a signal which is less influenced by the noise and beat and has good S/N can be obtained.

Abstract: A burst phase correcting circuit includes a first all-pass filter which receives a chrominance sign inputted from a terminal. A phase reference signal from an oscillator is applied to a first phase-comparator together with an output signal from the first all-pass filter, after the same is phase-shifted by 90 degrees by a first phase-shifter. A signal according to a phase difference of the both signals is outputted from the first phase-comparator and applied to the first all-pass filter via a first low-pass filter and a capacitor. Therefore, in the first all-pass filter, a delay time is varied in accordance with the phase difference between the chrominance signal and the phase reference signal. Therefore, a jitter component of the chrominance signal can be removed.

Abstract: An active filter circuit includes a first and second differential pairs each having a pair of transistors. A capacitor is connected to a collector of one transistor from each of the first and second differential pairs. A first and second negative feed-back paths are connected, respectively, between the collector and a base of one transistor of the first differential pair and between the collector of one transistor of the second differential pair and a base of the other transistor of the first differential pair. By applying suitable voltages to respective inputs of the differential pairs, the active filter circuit functions as a band-pass filter, lowpass filter, high-pass filter, band elimination filter or phase-shifting filter with the same circuit configuration. A current mirror circuit correlatively changes current amounts of the first and second differential pairs in response to a control voltage, whereby a filter characteristic can be changed.

Abstract: A capacitive circuit incorporated in an integrated circuit, the capacitive circuit including a high-pass type non-inverting amplifier which receives an input signal and a differential amplifier which receives the input signal and an output signal of the non-inverting amplifier. A differential component between both signals is detected by the differential amplifier and fed-back to the input signal, the input impedance having a capacitive characteristic because the input signal is phase-shifted by 90 degrees.

Abstract: A variable delay device includes a variable delay circuit (12) and a correction circuit (14). On the basis of output signals R and V from variable delay lines (30, 32) of the correction circuit, an output signal V.sub.L by which a control characteristic of a variable delay line (16) is made substantially linear is outputted to the variable delay circuit from a linearity detector (34) of the correction circuit. The output signals R and V are also applied to a variable range detector (36), and on the basis of an output of the detector (36), an output signal V.sub.r by which a variable range of the variable delay line (16) is made constant is outputted to the variable delay circuit (12) from a reference level generator (38) of the correction circuit. The output signal V.sub.L determines an input/output characteristic of a non-linear circuit (22) which is included in the variable delay circuit and modifies a variable amount control signal V.sub.d, and the output signal V.sub.

Abstract: A Y/C separation circuit includes a glass delay line for delaying an input composite video signal. A luminance signal and a chrominance signal are separated from each other by an adding circuit and a subtracting circuit each of which receives the input signal and an output signal from the glass delay line. The output signal from the glass delay line is phase-shifted by a 90.degree. phase shifting circuit and then inputted to a multiplier which further receives the input signal. The multiplier outputs an error signal according to a phase difference between color burst signals included in the both signals, and a control voltage according to the error signal is outputted from a low-pass filter. The control voltage is applied to gyrators which terminate an input and an output of the glass delay line, respectively, whereby an inductance value of each of the gyrators is controlled by the control voltage such that a delay time of the glass delay line can be exactly adjusted at one horizontal period.

Abstract: An equivalent inductance circuit includes a feedback type integration circuit and a differential amplifying circuit. An input signal applied to an input terminal is integrated by the feed-back type integration circuit and, a signal according to a difference component between an integrated output signal and the input signal is outputted by the differential amplifying circuit. By feeding the difference signal back to the input terminal, an input impedance equivalently represents an inductance characteristic. Such equivalent inductance can be changed by a current from a variable current source which supplies the current to the differential amplifying circuit and, a change of the equivalent inductance shows an inverse proportional manner.

Abstract: A frequency of a chrominance signal including a jitter component and separated from a color video signal is converted from a first frequency to a second frequency by first frequency converting device. Then, the chrominance signal which frequency is converted to the second frequency is converted to have the original frequency by second frequency converting device. Each of the first frequency converting device and the second frequency converting device includes a multiplier and a bandpass filter. One multiplier of the first and the second frequency converting devices and receives a frequency signal corresponding to a phase difference between a reference frequency signal and a color burst signal separated from the chrominance signal. As a result, the jitter component is removed from the chrominance signal either in the first or the second frequency converting.

Abstract: Provided is a signal reproducing circuit for an optical disc player including a multidivisional photodetector with photoelectric converting elements in a preceding side and photoelectric converting elements in a succeeding side relative to a proceeding direction of pits of an optical disc, a variable delay circuit for delaying outputs from the photoelectric converting elements in the preceding side, a circuit for detecting a time difference between an output from the photo electric converting elements in the succeeding side and an output from the variable delay circuit, and a circuit responsive to an output from the time difference detecting circuit for changing a delay time of the variable delaying circuit. The signal reproducing circuit further includes a circuit for amplifying and correcting high frequency components of signals reproduced by the photo detector in response to the output from the time difference detecting circuit.

Abstract: A synchronizing signal separating circuit inverts and amplifies, in an inverter 12, a composite video signal received from a video amplifying circuit 100 through a coupling condenser 1. An output node B of the inverter 12 is connected to an input node A of the inverter 12 through a switch 14 and a bias resistor 10. A bias resistor 11 is connected between the input node A and a ground potential. An output of the inverter 12 is further inverted and amplified by an inverter 13 and outputted as a composite synchronizing signal and also supplied to a control input of the switch 14. As a result, the switch 14 is turned on in a synchronizing signal period, so that the coupling condenser 1 is charged with the output of the inverter 12 and also the electric charges of the coupling condenser 1 are discharged through the bias resistor 11 in other period than the synchronizing signal period.

Abstract: A circuit for providing a signal phase locked to a horizontal synchronization signal included in a received video signal includes a first PLL loop (16, 44, 46; 16, 46', 204) and a second PLL or AFC loop (26, 44, 46; 26, 44, 46', 204). The first PPL loop has a plurality of lock ranges. The second PLL or AFC loop, which has an output characteristic with a single S curve, has one lock range large in width. The second PLL or AFC loop is supplied with a horizontal synchronization signal separated in a synchronization separating circuit via a bandpass filter. The first PLL loop is directly supplied with a horizontal synchronization signal extracted in the synchronization separating circuit. The first PLL loop shares a voltage controlled oscillator (46; 46') and a frequency divider (46; 204) with the second PLL loop or AFC loop.

Abstract: A peak holding circuit comprises a capacitor for holding signal charges corresponding to a peak level of an input signal, and a current amplifier circuit comprising transistors connected in a triple darlington manner for supplying an output current corresponding to the held charges. An emitter of a transistor in the first stage out of the transistors connected in a darlington manner is connected to a collector of another transistor through which a collector cut-off current flows which is approximately equal to a collector cut-off current flowing through the transistor in the first stage. The other transistor has its emitter connected to ground. Therefore, the collector cut-off current flowing through the transistor in the first stage is cancelled, so that fluctuations in output current can be prevented even if a large reactive current is not allowed to flow through a transistor in the final stage out of the transistors connected in a darlington manner.