Patents by Inventor Nobuo Hareyama

Nobuo Hareyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6700545
    Abstract: A transmission/reception apparatus has a first housing, a second housing, a folding section connecting the first and second housings, a first earth circuit board that has antenna circuitry thereon and that is provided with the first housing, a second earth circuit board that is provided with the second housing, and a flexible conduction member for connecting the first and second earth circuit boards. The first and second earth circuit boards and the flexible conduction member constitute an antenna apparatus, and during use of this antenna apparatus, a predetermined earth pattern length can be established by the first and second earth circuit boards.
    Type: Grant
    Filed: May 23, 2002
    Date of Patent: March 2, 2004
    Assignee: Sony Corporation
    Inventor: Nobuo Hareyama
  • Patent number: 6700440
    Abstract: A high-frequency power amplifier system including a plurality of individual amplifiers connected in parallel, the amplifiers including switching-driven FET's. A fixed drain voltage is applied to one amplifier and a variable drain voltage is applied to another amplifier through a section including a DC-DC converter that converts the voltage according to a control value of a control signal. The turning on and off of the operation of the power amplifier is controlled by a control signal. Also, the circuit constants of a matching circuit are variable. In a high output power region, the power amplifier is turned on and, in a low output power region, turned off. Thereby, the decrease of efficiency of the power amplifier, owing to the DC-DC converter, may be suppressed to a minimum. The matching of the amplifier is adjusted when the power amplifier is switched on or off so as to improve efficiency. Consequently, it becomes possible to continuously control the output of the amplifier.
    Type: Grant
    Filed: May 23, 2002
    Date of Patent: March 2, 2004
    Assignee: Sony Corporation
    Inventor: Nobuo Hareyama
  • Patent number: 6538506
    Abstract: A matching apparatus for matching impedances of a power amplifier and an antenna of a terminal apparatus in which transmission power control (TPC) is carried out between a base station and a portable wireless telephone set. The matching apparatus can transmit output power at excellent output efficiency regardless of the magnitude of the power of transmission output. A matching circuit provided between a power amplifier and a load includes a switching device, and impedances are switched and controlled by the switching device such that the impedances are suited to the transmission output power required for TPC and are properly matched.
    Type: Grant
    Filed: August 21, 2001
    Date of Patent: March 25, 2003
    Assignee: Sony Corporation
    Inventor: Nobuo Hareyama
  • Publication number: 20020186076
    Abstract: A high frequency power amplifier is provided with a plurality of amplifiers connected in parallel, the amplifiers including switching-driven FET's. A fixed drain voltage is applied to one amplifier and variable drain voltage is applied to another amplifier through a section including a DC-DC converter or the like that converts the voltage according to a control value of a control signal. The turning on and off of the operation of the power amplifier is controlled by a control signal. Also, the circuit constants of a matching circuit are variable. In a high output power region, the power amplifier is turned on and in a low output power region, turned off. Thereby, the decrease of efficiency of the power amplifier, owing to the DC-DC converter, may be suppressed to a minimum. The matching of the amplifier is adjusted when the power amplifier is switched on or off so as to improve efficiency. Consequently, it becomes possible to continuously control the output of the amplifier.
    Type: Application
    Filed: May 23, 2002
    Publication date: December 12, 2002
    Inventor: Nobuo Hareyama
  • Publication number: 20020180651
    Abstract: A transmission/reception apparatus has a first housing, a second housing, a folding section connecting the first and second housings, a first earth circuit board which has antenna circuitry thereon and is provided with the first housing, a second earth circuit board which is provided with the second housing, and a flexible conduction member for connecting the first and second earth circuit boards. The first and second earth circuit boards and the flexible conduction member constitute an antenna apparatus, and during use of this antenna apparatus, a predetermined earth pattern length can be secured by the first and second earth circuit boards.
    Type: Application
    Filed: May 23, 2002
    Publication date: December 5, 2002
    Inventor: Nobuo Hareyama
  • Publication number: 20020044016
    Abstract: A matching apparatus for matching impedances of a power amplifier and an antenna (load) of a terminal apparatus in which transmission power control (TPC) is carried out between a base station and a portable wireless telephone set. The matching apparatus can transmit output power at excellent output efficiency regardless of magnitude of any power of transmission output. A matching circuit provided between a power amplifier and a load includes a switching means, and impedances are switched and controlled by the switching means such that impedances may be suited to transmission output power required upon TPC and may be matched properly.
    Type: Application
    Filed: August 21, 2001
    Publication date: April 18, 2002
    Inventor: Nobuo Hareyama
  • Patent number: 6289208
    Abstract: A frequency synthesizer type receiver requiring small power consumption and maintaining excellent receiving performance. In the frequency synthesizer type receiver, a reception frequency thereof is set based on an oscillatory output of a PLL circuit. When the oscillation frequency of the PLL circuit is stabilized, a control voltage can be supplied to a voltage-controlled oscillator in the PLL circuit from a controller situated outside of the PLL circuit. The tuned state of a reception unit is measured at this time. If a shift in the reception frequency is detected based on the measured value, the control voltage to be supplied to the voltage-controlled oscillator is corrected.
    Type: Grant
    Filed: March 29, 1999
    Date of Patent: September 11, 2001
    Assignee: Sony Corporation
    Inventor: Nobuo Hareyama
  • Patent number: 5781594
    Abstract: A data transfer circuit for use with a base unit or a handset of a telephone system includes a switch circuit and a shift register. The switch circuit selects parallel fixed data or parallel input data, and outputs the selected data. The switch circuit is connected to inputs indicating whether the data transfer circuit is connected to a base unit or a handset for modifying the parallel fixed data in response to the indication. The shift register has two modes. In the first mode, the data selected and output by the switch circuit is loaded into the shift register in parallel. In the second mode, the loaded data is output from the shift register in series.
    Type: Grant
    Filed: March 28, 1997
    Date of Patent: July 14, 1998
    Assignee: Sony Corporation
    Inventor: Nobuo Hareyama
  • Patent number: 5757921
    Abstract: A superheterodyne receiving circuit and a superheterodyne transmitting circuit are provided. A PLL forms a local oscillation signal in the receiving circuit, and a PLL forms a carrier signal in the signal transmitting circuit. A circuit converts digital data into signals suitable for transmission, and an oscillating circuit provides an oscillation signal. A frequency-dividing circuit forms a frequency-division signal of a reference frequency which is supplied to the PLLs by frequency-dividing the oscillation signal circuit, and a frequency-dividing circuit generates a clock signal required in the conversion circuit by frequency-dividing the oscillation signal. A frequency-dividing circuit forms a signal for descrambling the received voice signals which have been scrambled by frequency-dividing the oscillation signal, and a frequency-dividing circuit forms a signal for scrambling the voice signals to be transmitted by frequency-dividing the oscillation signal.
    Type: Grant
    Filed: March 18, 1996
    Date of Patent: May 26, 1998
    Assignee: Sony Corporation
    Inventors: Taiwa Okanobu, Nobuo Hareyama, Hiroshi Yokoyama
  • Patent number: 5752169
    Abstract: An integrated circuit comprises a variable frequency divider for setting a signal transmitting frequency in accordance with a frequency dividing ratio based on externally-provided data. A data converter converts the externally-provided data to a signal for transmission, and a switch selectively provides the externally-provided data to the variable frequency divider and the data converter. As a result, the number of terminals may be reduced, the IC package may be made more compact, the mounting surface area may be reduced, the equipment may be made smaller, and the interference of the data signal provided to the circuit for setting the frequency dividing ratio or the circuit for transmitting data is reduced.
    Type: Grant
    Filed: March 11, 1996
    Date of Patent: May 12, 1998
    Assignee: Sony Corporation
    Inventors: Nobuo Hareyama, Hiroshi Yokoyama
  • Patent number: 5657464
    Abstract: A data transfer circuit for use with a base unit or a handset of a telephone system includes a switch circuit and a shift register. The switch circuit selects parallel fixed data or parallel input data, and outputs the selected data. The switch circuit is connected to inputs indicating whether the data transfer circuit is connected to a base unit or a handset for modifying the parallel fixed data in response to the indication. The shift register has two modes. In the first mode, the data selected and output by the switch circuit is loaded into the shift register in parallel. In the second mode, the loaded data is output from the shift register in series.
    Type: Grant
    Filed: February 9, 1996
    Date of Patent: August 12, 1997
    Assignee: Sony Corporation
    Inventor: Nobuo Hareyama
  • Patent number: 4963838
    Abstract: A frequency synthesizer having first and second PLLs coupled by a mixer to provide an output signal which changes in predetermined frequency steps or increments is capable of operation in a first frequency change mode in which frequencies of output signals from the first and second PLLS change in the same direction or in a second frequency change mode in which the frequencies of the output signals from the first and second PLLs change in opposite directions, and the first or second frequency change mode is selected on the basis of a dividing ratio employed in one of the first and second PLLs.
    Type: Grant
    Filed: December 22, 1989
    Date of Patent: October 16, 1990
    Assignee: Sony Corporation
    Inventor: Nobuo Hareyama
  • Patent number: 4771455
    Abstract: The present invention relates to a scrambling apparatus and particularly to a scrambling apparatus in which a scrambling signal is inserted into a main signal in a predetermined period (period of duration during which the main signal is not damaged) of the main signal which makes a dummy signal.According to an embodiment of the present invention, there is provided a scrambling apparatus which comprises a detecting circuit (36) for detecting that the level of the above main signal becomes lower than a predetermined value and an adding circuit (25) for adding the above main signal and the scrambling signal whereby the supply of the above scrambling signal to the adding circuit (25) is stopped by the output from the detecting circuit (36) to prevent the scrambled signal from being leaked.The scrambling apparatus of the invention can be applied to an interphone and the like.
    Type: Grant
    Filed: January 12, 1984
    Date of Patent: September 13, 1988
    Assignee: Sony Corporation
    Inventors: Nobuo Hareyama, Mitsuo Ohsawa