Patents by Inventor Nobuo Kamehara
Nobuo Kamehara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6528346Abstract: First and second ball forming plates are prepared. The cavities of the first plate and the cavities of the second plate 20 are filled with solder paste, respectively. The first plate and the second plate are placed in a facing relationship to each other and heated to form metal balls each of which corresponds to the total metal components of the solder paste in one cavity of the first plate and one cavity in the second plate. The metal balls are formed in the cavities of the lower plate 10. The metal balls are transferred from the cavities of the first plate to a device on which bumps are to be formed.Type: GrantFiled: December 28, 2000Date of Patent: March 4, 2003Assignee: Fujitsu LimitedInventors: Masayuki Ochiai, Hidefumi Ueda, Michio Sono, Ichiro Yamaguchi, Kazuhiko Mitobe, Koki Otake, Junichi Kasai, Nobuo Kamehara, Yasuo Yamagishi, Masataka Mizukoshi
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Publication number: 20010018263Abstract: First and second ball forming plates are prepared. The cavities of the first plate and the cavities of the second plate 20 are filled with solder paste, respectively. The first plate and the second plate are placed in a facing relationship to each other and heated to form metal balls each of which corresponds to the total metal components of the solder paste in one cavity of the first plate and one cavity in the second plate. The metal balls are formed in the cavities of the lower plate 10. The metal balls are transferred from the cavities of the first plate to a device on which bumps are to be formed.Type: ApplicationFiled: December 28, 2000Publication date: August 30, 2001Inventors: Masayuki Ochiai, Hidefumi Ueda, Michio Sono, Ichiro Yamaguchi, Kazuhiko Mitobe, Koki Otake, Junichi Kasai, Nobuo Kamehara, Yasuo Yamagishi, Masataka Mizukoshi
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Patent number: 6193905Abstract: A coolant for cooling a semiconductor element by direct immersion, cooling, which has an improved cooling capability, is disclosed. The coolant comprises a low boiling point fluorocarbon having a boiling point of 30° C. to 100° C. and a high boiling point fluorocarbon having a boiling point higher than that of the low boiling point fluorocarbon by at least 100° C.; an amount of the high boiling point fluorocarbon being less than 20% by volume, based on the volume of the low boiling point fluorocarbon.Type: GrantFiled: January 30, 1995Date of Patent: February 27, 2001Assignee: Fujitsu LimitedInventors: Mitsutaka Yamada, Kishio Yokouchi, Nobuo Kamehara, Koichi Niwa
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Patent number: 6156259Abstract: In a method of manufacturing piezoelectric ceramics by molding pre-fired or calcined powders of ingredients of a piezoelectric ceramic material and sintering the powder mold at a high pressure, the powder mold is pre-sintered at an atmospheric pressure before sintering at high pressure (HIP). Preferably, after the sintering HIP step, a thermal treatment is performed at a temperature of from 500 to 1000.degree. C. under an oxidizing atmosphere. For a Pb(Zn.sub.1/3 Nb.sub.2/3)O.sub.3 --PbTiO.sub.3 based piezoelectric ceramic, the composition is preferably set to (Pb.sub.1-x Ba.sub.x)[(Zn.sub.1/3 Nb.sub.2/3).sub.1-y Ti.sub.y ]O.sub.3, where 0.001<x<0.055 and 0.05<y<0.20.Type: GrantFiled: October 6, 1995Date of Patent: December 5, 2000Assignee: Fujitsu LimitedInventors: Motoyuki Nishizawa, Mineharu Tsukada, Kaoru Hashimoto, Nobuo Kamehara
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Patent number: 6097412Abstract: A piezoelectric device including an insulating substrate and a displacement layer formed on the insulating substrate including a first electrode, a piezoelectric layer and a second electrode laid on the insulating substrate in the stated order, a part of a surface of the piezoelectric device in a region where the first and the second electrodes overlap each other is projected out of the rest part of the surface. The multi-layer body has a pair of high rigidity plates each provided on a side-wall for securing the multi-layer body.Type: GrantFiled: May 21, 1998Date of Patent: August 1, 2000Assignee: Fujitsu LimitedInventors: Mineharu Tsukada, Koji Omote, Masaharu Hida, Nobuo Kamehara, Motoyuki Nishizawa, Kazuaki Kurihara
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Patent number: 6025258Abstract: A method for fabricating solder bumps onto a semiconductor chip. A solder ball forming member having a flat surface and a plurality of cavities arranged on the flat surface in a predetermined pattern is prepared. The cavities are then filled with a solder paste, and the solder ball forming member is heated to a temperature higher than the melting point of the solder so that the molten solder powder in the solder paste form solder balls due to surface tension. The semiconductor chip is then moved toward the solder ball forming member to transfer the heated solder balls from the solder ball forming member to the semiconductor chip.Type: GrantFiled: August 17, 1995Date of Patent: February 15, 2000Assignee: Fujitsu LimitedInventors: Masayuki Ochiai, Hidefumi Ueda, Michio Sono, Ichiro Yamaguchi, Kazuhiko Mitobe, Koki Otake, Junichi Kasai, Nobuo Kamehara, Yasuo Yamagishi, Masataka Mizukoshi
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Patent number: 5962955Abstract: A piezoelectric device including an insulating substrate and a displacement layer formed on the insulating substrate including a first common electrode, a piezoelectric layer and a plurality of second electrodes laid on the insulating substrate in the stated order, where a part of a surface of the piezoelectric device in a region where the first and the second electrodes overlap each other is projected out of the rest part of the surface. The thus-formed piezoelectric device can increase the amount of displacement of the displacement layer.Type: GrantFiled: February 7, 1997Date of Patent: October 5, 1999Assignee: Fujitsu LimitedInventors: Mineharu Tsukada, Koji Omote, Masaharu Hida, Nobuo Kamehara, Motoyuki Nishizawa, Kazuaki Kurihara
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Patent number: 5906481Abstract: A piezoelectric fluid pump includes a stationary pump base and a plurality of piezoelectric elements arranged in parallel on the stationary pump base, each of the piezoelectric elements having, in a polarizing direction thereof or in a direction perpendicular to the polarizing direction, a first end fixed to the stationary pump base and a free, second end. The free, second ends of respective pairs of adjacent the piezoelectric elements are connected to each other, for respective units of the fluid pump. Between the pair of piezoelectric elements and between the stationary pump base and the connecting means, pressure chambers are defined. There are gaps are between walls of the piezoelectric elements and walls of piezoelectric elements of adjacent units.Type: GrantFiled: May 22, 1996Date of Patent: May 25, 1999Assignees: Fujitsu Limited, Fujitsu Isotec LimitedInventors: Kazuki Ogawa, Yuji Yoshida, Motoyuki Nishizawa, Nobuo Kamehara, Akio Yano, Akihiko Miyaki, Masahiro Ono, Yasuo Numata, Kazuaki Kurihara, Keiji Watanabe
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Patent number: 5683529Abstract: A process of producing a multiple-layer circuit board of aluminum nitride, including the steps of: preparing green sheets of aluminum nitride, forming on the green sheets conductor patterns of a conductor paste containing tungsten as a main conductor component, laminating the green sheets with the conductor patterns formed thereon to form a lamination, and firing the lamination in a container made of boron nitride and in a pressurized nitrogen gas atmosphere.Type: GrantFiled: June 11, 1996Date of Patent: November 4, 1997Assignee: Fujitsu LimitedInventors: Hiroshi Makihara, Koji Omote, Nobuo Kamehara, Mineharu Tsukada
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Patent number: 5659004Abstract: An epoxy resin composition contains an epoxy resin as a substratal resin and incorporates therein a polyallylphenol curing agent. The composition may also contain a polyphenol compound. The epoxy resin may have a naphthalene skeleton. The epoxy resin composition may also include a blend of two or more epoxy resins.Type: GrantFiled: February 16, 1995Date of Patent: August 19, 1997Assignee: Fujitsu LimitedInventors: Yukio Takigawa, Yoshihiro Nakata, Shigeaki Yagi, Norio Sawatari, Nobuo Kamehara
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Patent number: 5643831Abstract: A method for fabricating a semiconductor device using a solder ball forming plate having cavities. The plate is made from a silicon plate having a flat surface in a <110> crystallographic plane, and an orientation flat in a <1-11> crystallographic plane. The cavities are formed on the flat surface of the plate by etching, using a mask having openings in the shape of rhombus arranged such that one side of the rhombus is generally parallel to the <1-11> crystallographic plane. As a result, the cavities having wedge-shaped bottom are formed. The cavities are then filled with a solder paste and are heated to form solder balls in the cavities while the plate in an inclined position. The solder balls are then transferred from the plate to a semiconductor chip.Type: GrantFiled: October 24, 1995Date of Patent: July 1, 1997Assignee: Fujitsu LimitedInventors: Masayuki Ochiai, Hidefumi Ueda, Michio Sono, Ichiro Yamaguchi, Kazuhiko Mitobe, Koki Otake, Junichi Kasai, Nobuo Kamehara, Yasuo Yamagishi, Masataka Mizukoshi, Yutaka Yamada, Susumu Abe
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Patent number: 5629269Abstract: Disclosed is a process for forming a super-conducting film, which a multi-layer metal film (buffer film) is formed at a specific temperature on a ceramic substrate and a superconducting film is formed at a specific temperature on the multi-layer metal film. According to this process, a superconducting film having a high critical temperature can be formed over the ceramic substrate while controlling or suppressing the occurrence of a chemical reaction between the substrate and the superconducting film, and required superconducting performances can be manifested or exhibited.Type: GrantFiled: October 31, 1994Date of Patent: May 13, 1997Assignee: Fujitsu LimitedInventors: Kazunori Yamanaka, Takuya Uzumaki, Nobuo Kamehara, Koichi Niwa
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Patent number: 5593526Abstract: A process for producing a multi-layer wiring board having alternate layers of a glass ceramic material and conductor patterns. The glass ceramic layers are made up of a glass ceramic material including a glass matrix and ceramic particles dispersed in the matrix. The glass ceramic layers are caused to contain hollow or porous silica glass spheres dispersed in the glass ceramic material. The hollow or porous silica glass spheres are covered with a ceramic coating layer containing alumina as a constituent element. Such a structure prevents crystallization of the silica spheres and avoids the resultant rapid increase in the the thermal expansion coefficient of the glass ceramic layers. The structure provided by the process of the invention also precudes the formation of pores in the surfaces of the glass ceramic layers.Type: GrantFiled: September 30, 1994Date of Patent: January 14, 1997Assignee: Fujitsu LimitedInventors: Kishio Yokouchi, Hiroshi Kamezaki, Masato Wakamura, Nobuo Kamehara, Koichi Niwa
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Patent number: 5585332Abstract: A perovskite type superconductor film having a high content, almost a single phase, of the high Tc phase is formed by the steps of: depositing at least one first film of a first material (e.g., a composite oxide of Bi-Sr-Ca-Cu-O system or Tl-Ba-Ca-Cu-O system) constituting a perovskite type superconductor over a substrate; depositing at least one second film of a second material containing an oxide or element (Bi.sub.2 O.sub.3, Tl.sub.2 O.sub.3, PbO.sub.x, etc., particularly PbO.sub.x) having a vapor pressure of more than 10.sup.-4 Pa at 800.degree. C. at least as a main component over the substrate; to thereby form a stack of the first and second films; and heat treating the stack of the first and second films to form the perovskite type superconductor film on the substrate. Further, preferred compositions of the as-deposited films or stack are determined.Type: GrantFiled: January 25, 1995Date of Patent: December 17, 1996Assignee: Fujitsu LimitedInventors: Atsushi Tanaka, Nobuo Kamehara, Koichi Niwa
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Patent number: 5458709Abstract: A process for manufacturing a multi-layer glass ceramic substrate which includes the steps of forming green sheets containing ceramic powders and glass powders as main ingredients, laminating the green sheets, and firing the laminated green sheets to form a multi-layer glass ceramic substrate, wherein at least one green sheet containing porous glass powders as a part of the glass powders, is provided to control the shrinkage of the green sheets and prevent cracks or delamination.Type: GrantFiled: April 13, 1992Date of Patent: October 17, 1995Assignee: Fujitsu LimitedInventors: Hiroshi Kamezaki, Masato Wakamura, Kishio Yokouchi, Nobuo Kamehara
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Patent number: 5443786Abstract: A composition for the formation of vias on a ceramic substrate, the composition including (a) at least one powder containing copper, gold, silver, tungsten, molybdenum, nickel, palladium, platinum, aluminium, or an alloy thereof; and (b) 5 to 40 wt %, based on the weight of the powder in the composition, of one or more of an organosilicic compound, an organoaluminium compound, an organozirconium compound, and an organomagnesium compound. A further embodiment of a composition for the formation of vias includes (a) and (b) above and, in addition, (c) a binder material including a cellulose derivative or a heat decomposable polymethamethyl acrylate binder, and (d) a high boiling point organic solvent. The invention also includes a method for use in the formation of vias on a substrate having perforating holes therein. Such a substrate could be a glass ceramic composite substrate, an alumina substrate, a magnesia substrate, a zirconia substrate, or green sheets thereof.Type: GrantFiled: December 17, 1991Date of Patent: August 22, 1995Assignee: Fujitsu LimitedInventors: Hiromitsu Yokoyama, Koji Omote, Hitoshi Suzuki, Mineharu Tsukada, Nobuo Kamehara, Koichi Niwa
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Patent number: 5349499Abstract: A coolant for cooling a semiconductor element by direct immersion, cooling, which has an improved cooling capability, is disclosed. The coolant comprises a low boiling point fluorocarbon having a boiling point of 30.degree. C. to 100.degree. C. and a high boiling point fluorocarbon having a boiling point higher than that of the low boiling point fluorocarbon by at least 100.degree. C.; an amount of the high boiling point fluorocarbon being less than 20% by volume, based on the volume of the low boiling point fluorocarbon.Type: GrantFiled: April 28, 1993Date of Patent: September 20, 1994Assignee: Fujitsu LimitedInventors: Mitsutaka Yamada, Kishio Yokouchi, Nobuo Kamehara, Koichi Niwa
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Patent number: 5312803Abstract: In an oxide superconducting film wiring, when the line width is reduced, the evaporation of a component during firing becomes so vigorous that it becomes impossible to form a desired single crystal phase, which causes a significant lowering in the properties of the oxide superconducting wiring. This problem can be solved by preventing the evaporation of the evaporable component during the firing. Examples of this include a process wherein plate is placed above the superconductor forming material film wiring pattern on the substrate so as to face each other, the plate comprising a material having no chemical influence on the superconducting wiring, and a pattern of a material containing an evaporable component is arbitrarily formed, a process wherein a pattern having a smaller line width is sandwiched between patterns having a larger line width, and a process wherein the firing atmosphere or the concentration of the evaporable component in the pattern is varied depending upon the line width.Type: GrantFiled: June 16, 1992Date of Patent: May 17, 1994Assignee: Fujitsu LimitedInventors: Atsushi Tanaka, Kazunori Yamanaka, Nobuo Kamehara, Koichi Niwa
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Patent number: 5306702Abstract: A process for producing a Bi-based perovskite superconducting film, comprising the steps of forming on a substrate a Pb-film, containing Bi-base material film comprising Bi, Pb, Sr, Ca and Cu in a Bi:Pb:Sr:Ca:Cu molar ratio of (1.9 to 2.1):(1.2 to 2.2, preferably 1.5 to 1.8):2:(1.9 to 2.2):(3 to 3.5) and sintering the Pb-containing Bi-base material film in an oxygen-containing atmosphere. The sintering step includes a main sintering period of 20 to 120 minutes, in which the temperature is raised from a first temperature to a second temperature, with the second temperature being in a range of 850.degree. to 860.degree. C., and the temperature rise in the main sintering period of 20 to 120 minutes being from 3.degree. to 10.degree. C.Type: GrantFiled: June 17, 1992Date of Patent: April 26, 1994Assignee: Fujitsu LimitedInventors: Atsushi Tanaka, Nobuo Kamehara, Koichi Niwa
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Patent number: 5287620Abstract: A process of producing a multiple-layer glass-ceramic circuit board having a copper conductor, comprising the steps of: forming throughholes in a glass-ceramic green sheet at sites where via-contacts will be formed; filling the throughholes with a powder mixture of a copper powder blended with a ceramic powder, the copper powder and the ceramic powder having a powder particle size providing a packing density comparable with or greater than that of the glass-ceramic green sheet when filled in the throughholes; printing a conductor paste on the green sheet having the throughholes filled with the powder mixture, to form a circuit conductor pattern on the green sheet; laminating a plurality of the green sheets having the conductor pattern formed thereon, to form a laminate body; heating the laminate body to thereby remove a binder therefrom and preliminary-fire the laminate body; and firing the preliminary-fired body.Type: GrantFiled: June 8, 1992Date of Patent: February 22, 1994Assignee: Fujitsu LimitedInventors: Hitoshi Suzuki, Wataru Yamagishi, Koichi Niwa, Kaoru Hashimoto, Nobuo Kamehara