Patents by Inventor Nobuo Ooyama

Nobuo Ooyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and apparatus for testing semiconductor devices
    Patent number: 6392433
    Abstract: A method of testing semiconductor devices includes an adhering step, a position correcting step, and an electrical test step. The adhering step includes adhering either a semiconductor device collective body or a plurality of individual semiconductor devices onto an adhesive tape provided on a tape-holding member, the semiconductor device collective body being constructed by a plurality of semiconductor devices integrated together. The position correcting step includes positioning the semiconductor devices by mounting the tape-holding member on a position correction unit and, using an image processing technique, implementing position recognition and position correction of the semiconductor devices adhered on the adhesive tape. The electrical test step includes implementing an electrical characteristic test on the semiconductor devices positioned in the position correction step by connected the semiconductor devices on a testing contactor.
    Type: Grant
    Filed: July 12, 1999
    Date of Patent: May 21, 2002
    Assignee: Fujitsu Limited
    Inventors: Kenji Itasaka, Terumi Kamifukumoto, Yuji Akasaki, Nobuo Ooyama
  • METHOD AND APPARATUS FOR TESTING SEMICONDUCTOR DEVICES
    Publication number: 20010043076
    Abstract: A method of testing semiconductor devices includes an adhering step, a position correcting step, and an electrical test step. The adhering step includes adhering either a semiconductor device collective body or a plurality of individual semiconductor devices onto an adhesive tape provided on a tape-holding member, the semiconductor device collective body being constructed by a plurality of semiconductor devices integrated together. The position correcting step includes positioning the semiconductor devices by mounting the tape-holding member on a position correction unit and, using an image processing technique, implementing position recognition and position correction of the semiconductor devices adhered on the adhesive tape. The electrical test step includes implementing an electrical characteristic test on the semiconductor devices positioned in the position correction step by connected the semiconductor devices on a testing contactor.
    Type: Application
    Filed: July 12, 1999
    Publication date: November 22, 2001
    Inventors: KENJI ITASAKA, TERUMI KAMIFUKUMOTO, YUJI AKASAKI, NOBUO OOYAMA
  • Semiconductor device and method of producing the same
    Patent number: 6191494
    Abstract: A semiconductor device and a method of producing the same are provided. The semiconductor device includes: a semiconductor chip; a resin package which seals the semiconductor chip; signal passages which guide the signal terminals of the semiconductor chip outward from the resin package; a grounding metal film in contact with the bottom surface of the semiconductor chip; and a grounding passage which is connected to the grounding metal film and guided outward from the resin package.
    Type: Grant
    Filed: June 29, 1999
    Date of Patent: February 20, 2001
    Assignee: Fujitsu Limited
    Inventors: Nobuo Ooyama, Shinichiro Maki, Fumitoshi Fujisaki, Syunichi Kuramoto, Yukio Saigo, Yasuo Yatsuda, Youichi Matae, Atsushi Yano, Kazuto Tsuji, Masafumi Tetaka