Abstract: There is provided a test apparatus that tests an electronic device. The test apparatus includes a socket board in which a socket for mounting thereon the electronic device is provided, and a test head that detachably holds the socket board and transmits source power to the electronic device via the socket board, the test head includes a first source power transmission line that transmits the source power to the socket board, a first bypass capacitor that is provided between the first source power transmission line and ground potential, and a switch that switches whether the first bypass capacitor is connected between the first source power transmission line and the ground potential, and the socket board includes a second source power transmission line that transmits the source power to the electronic device, and a second bypass capacitor that is fixedly connected between the second source power transmission line and the ground potential.

Abstract: There is provided a test apparatus that tests an electronic device. The test apparatus includes a socket board in which a socket for mounting thereon the electronic device is provided, and a test head that detachably holds the socket board and transmits source power to the electronic device via the socket board, the test head includes a first source power transmission line that transmits the source power to the socket board, a first bypass capacitor that is provided between the first source power transmission line and ground potential, and a switch that switches whether the first bypass capacitor is connected between the first source power transmission line and the ground potential, and the socket board includes a second source power transmission line that transmits the source power to the electronic device, and a second bypass capacitor that is fixedly connected between the second source power transmission line and the ground potential.

Abstract: A timing correcting method for correcting the timings of an IC tester at low cost, wherein the method uses a probe (300) for taking out a signal fed to a pin out of the pins of an IC socket (203) to which an IC to be measured is plugged when the probe is brought into contact with the pin and supplying a correcting pulse to the pin, and the timing of the correcting pulse taken in by a reference comparator (CP-RF) provided in the probe and the timing of a reference correcting pulse applied to an IC socket from a reference driver (DR-RF) provided in the probe are measured by a timing measuring function that the IC tester has, thus performing timing correction.

Abstract: A clock pulse transmission circuit is provided which can automatically correct, in case the duty factor of transmitted clock pulses has an error, the duty factor error. In a receiving unit 2, a pair of positive and negative clock pulses Sp and Sn transmitted from a transmitting unit 1 are inputted to a receiver 12 which outputs, in response thereto, a pair of positive and negative clock pulses V3 and V4. The DC components of these positive and negative clock pulses are taken out by a first integrator circuit and a second integrator circuit respectively to transmit them to the transmitting unit 1 through a pair of transmission lines 25 and 26, respectively. In the transmitting unit 1, a difference between the direct current levels of the respective positive and negative clock pulses is found and integrated. The integrated value is supplied to a driver 6 as a threshold voltage Vth.