Abstract: A semiconductor device is manufactured by forming a hole as being extended through a first insulating film and an insulating interlayer stacked over a semiconductor substrate, allowing side-etching of the inner wall of the hole to proceed specifically in a portion of the insulating interlayer, to thereby form a structure having the first insulating film projected out from the edge towards the center of the hole; forming a lower electrode film as being extended over the top surface, side face and back surface of the first insulating film, and over the inner wall and bottom surface of the hole; filling a protective film in the hole; removing the lower electrode film specifically in portions fallen on the top surface and side face of the first insulating film; removing the protective film; and forming a cylindrical capacitor in the hole.

Abstract: A semiconductor device is manufactured by forming a hole as being extended through a first insulating film and an insulating interlayer stacked over a semiconductor substrate, allowing side-etching of the inner wall of the hole to proceed specifically in a portion of the insulating interlayer, to thereby form a structure having the first insulating film projected out from the edge towards the center of the hole; forming a lower electrode film as being extended over the top surface, side face and back surface of the first insulating film, and over the inner wall and bottom surface of the hole; filling a protective film in the hole; removing the lower electrode film specifically in portions fallen on the top surface and side face of the first insulating film; removing the protective film; and forming a cylindrical capacitor in the hole.

Abstract: A semiconductor device is manufactured by forming a hole as being extended through a first insulating film and an insulating interlayer stacked over a semiconductor substrate, allowing side-etching of the inner wall of the hole to proceed specifically in a portion of the insulating interlayer, to thereby form a structure having the first insulating film projected out from the edge towards the center of the hole; forming a lower electrode film as being extended over the top surface, side face and back surface of the first insulating film, and over the inner wall and bottom surface of the hole; filling a protective film in the hole; removing the lower electrode film specifically in portions fallen on the top surface and side face of the first insulating film; removing the protective film; and forming a cylindrical capacitor in the hole.

Abstract: A semiconductor device is manufactured by forming a hole as being extended through a first insulating film and an insulating interlayer stacked over a semiconductor substrate, allowing side-etching of the inner wall of the hole to proceed specifically in a portion of the insulating interlayer, to thereby form a structure having the first insulating film projected out from the edge towards the center of the hole; forming a lower electrode film as being extended over the top surface, side face and back surface of the first insulating film, and over the inner wall and bottom surface of the hole; filling a protective film in the hole; removing the lower electrode film specifically in portions fallen on the top surface and side face of the first insulating film; removing the protective film; and forming a cylindrical capacitor in the hole.

Abstract: The semiconductor device 100 includes: a semiconductor substrate 102; a capacitor 116 formed on the semiconductor substrate 102, including a structure composed of a lower electrode 118, a capacitive film 120 and an upper electrode 122, which are stacked in this sequence; an extracting unit 124 of the upper electrode 122 of the capacitor 116; and a contact 108c formed below the extracting unit 124, and providing an electrical coupling between the extracting unit 124 and an underlying interconnect such as an impurity-diffused region 103 and the like.

Abstract: There is provided a semiconductor device manufacturing method, in which a thin film made of a conductive film or an insulator film is formed on a substrate and then alignment is repeated using photolithography to thereby manufacture a DRAM. In this method, using a third photo-resist film as a mask, an opaque titanium nitride film as an upper capacitor electrode film is removed and then, a fourth photo-resist film is formed in alignment with an alignment mark on the substrate via a first inter-layer insulator film. After this, an upper capacitor electrode is formed using the fourth photo-resist film.

Abstract: In a laser beam make-link programmable semiconductor device, a pair of conductor strips are formed in the same level plane on a lower level insulator film formed on a semiconductor substrate, and are separated from each other in such a manner that opposing ends of the pair of conductor strips are separated by a predetermined distance smaller than a film thickness of the upper level insulator film. An upper level insulator film substantially transparent to a laser beam, is formed on the conductor strips. With this arrangement, even if a trimming laser beam has a small energy, the laser beam permeates through the upper level insulator film to reach and melt the opposing ends of the pair of conductor strips, with the result that the opposing ends of the pair of conductor strips are short-circuited.

Abstract: An N.sup.- type epitaxial layer is formed on a P type semiconductor substrate, and a P.sup.+ type insulative isolating layer is so formed as to reach the semiconductor substrate from the surface of the N.sup.- type epitaxial layer to define a device forming region in the N.sup.- type epitaxial layer. An N.sup.+ type source diffusion layer and an N.sup.+ type drain diffusion layer are formed on the N.sup.- type epitaxial layer in the device forming region, apart from each other in one direction. A plurality of P.sup.+ type gate diffusion layers are formed between the N.sup.+ type source diffusion layer and N.sup.+ type drain diffusion layer, apart from one another in a direction perpendicular to the one direction. Channel regions for controlling the source-drain current are formed between the P.sup.+ type insulative isolating layer and the gate diffusion layer and between adjoining gate diffusion layers.

Abstract: A method for forming a semiconductor device that can reduces the in size or height of a step generated near the mouth of a trench as compared with steps formed according to conventional methods. A semiconductor substrate is selectively removed to produce a trench therein. Next, the trench is filled with polysilicon. A top end of the polysilicon is lower than a surface of the substrate and a hollow space is produced at the top end of the trench. Then, a silicon filler is selectively formed on the top end of the polysilicon in the trench by crystal growth. A top end of the filler is substantially on the same level with the surface of the substrate. The top end of the filler is preferably higher than the surface of the substrate by -0.1 .mu.m to +0.2 .mu.m.

Abstract: The invention provides an output circuit in a semiconductor integrated circuit which comprises an input terminal for receiving input signals controlling output circuits, an output terminal for delivering output signals driving a load device being connected to the output terminal, high and low voltage supply lines for supplying high and low voltage driving the output circuit, a first current mirror circuit on its output stage including a single transistor being connected between the high voltage supply line and the output terminal, a second current mirror circuit on its output stage including a single transistor being connected between the low voltage supply line and the output terminal, a first logic circuit being connected between the input terminal and the first current mirror circuit for receiving input signals from the input terminal for a subsequent controlling of the first current mirror circuit, and a second logic circuit being connected between the input terminal and the second current mirror circuit

Abstract: A power-on reset circuit device has a first power-on reset circuit which outputs a first reset signal, when an external power supply voltage reaches a first reference voltage, for resetting a DC-DC converter for producing a plurality of internal power supply voltages; a second power-on reset circuit which outputs a second reset signal, when the internal power supply voltage produced by the DC-DC converter reaches a second reference voltage, for resetting an internal circuit; and transistor switches for respectively inactivating the first power-on reset circuit and fixing the level of the first reset signal in response to the second reset signal. Power consumed by the power-on reset circuit device can be kept low because, in response to the second reset signal, the first power-on reset circuit is inactivated by the second power-on reset circuit. The power-on reset circuit device can be formed by a small number of circuit components required.