Patents by Inventor Nobutoshi Terasawa
Nobutoshi Terasawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240020895Abstract: A chart generation method includes: extracting history information for sensor data detected from an apparatus that corresponds to the state of the apparatus at the time when a specific event has occurred; generating a chart representing time-series data obtained by statistically processing the extracted sensor data history information with reference to a memory unit that defines a statistical processing technique; and displaying the generated chart on a display unit.Type: ApplicationFiled: July 11, 2023Publication date: January 18, 2024Inventors: Nobutoshi TERASAWA, Kazushi SHOJI, Nao AKASHI, Shintaro SARUWATARI, Motokatsu MIYAZAKI
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Publication number: 20240012373Abstract: An information processing apparatus includes an acquisition unit that acquires a physical sensor output value output from a plurality of physical sensors installed in a substrate processing apparatus; a prediction unit that predicts a virtual sensor output value of a virtual sensor corresponding to a prediction target physical sensor by using a statistical model or a physical model, based on a degree of similarity between the physical sensor output value and data learned by the statistical model; an abnormality determination unit that compares the physical sensor output value of the prediction target physical sensor with the virtual sensor output value of the virtual sensor, thereby determining whether an abnormality occurs in the physical sensor; and an instruction unit that switches from a control based on the physical sensor output value to a control based on the virtual sensor output value when determined that the abnormality occurs in the physical sensor.Type: ApplicationFiled: July 5, 2023Publication date: January 11, 2024Inventors: Nao AKASHI, Nobutoshi TERASAWA, Kazushi SHOJI
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Patent number: 11567485Abstract: A substrate processing system includes: an acquiring unit configured to acquire process data of each step when each step included in a predetermined process is executed under different control conditions; an extracting unit configured to divide each step into a first section in which the process data fluctuates and a second section in which the process data is converged, and extract first data belonging to the first section and second data belonging to the second section from the process data; and a monitoring unit configured to monitor the process data by comparing one or both of an evaluation value that evaluates the first data and an evaluation value that evaluates the second data with corresponding upper and lower limit values.Type: GrantFiled: July 2, 2020Date of Patent: January 31, 2023Assignee: TOKYO ELECTRON LIMITEDInventors: Nobutoshi Terasawa, Noriaki Koyama, Tomonori Yamashita, Takazumi Tanaka, Takehiro Kinoshita, Fumiaki Nagai, Eiji Kikama
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Publication number: 20220270940Abstract: An abnormality detection method includes: supplying a gas controlled to a selected rate to a gas supply pipe via the gas pipe connected to the gas supply pipe, thereby introducing the gas into a reaction region of a processing container provided in a processing apparatus from a gas hole of the gas supply pipe; measuring a pressure inside the gas pipe by a pressure gauge attached to the gas pipe; and detecting an abnormality of at least one of the gas supply pipe and the gas pipe based on the pressure measured at the measuring.Type: ApplicationFiled: February 18, 2022Publication date: August 25, 2022Inventors: Shingo HISHIYA, Nobutoshi TERASAWA, Fumiaki NAGAI, Kazuaki SASAKI, Hiroaki KIKUCHI, Masayuki KITAMURA, Kazuo YABE, Motoshi FUKUDOME, Tatsuya MIYAHARA, Eiji KIKAMA, Yuki TANABE, Tomoyuki NAGATA
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Publication number: 20210397169Abstract: An information processing apparatus detects an abnormality sign in a semiconductor manufacturing apparatus. The apparatus includes: a sensor data collector configured to acquire sensor waveform data with respect to a sensor value axis and a time axis measured by a semiconductor manufacturing apparatus that is executing a process according to a same recipe; a monitoring band calculator configured to calculate each monitoring band for the sensor value axis and the time axis used in a waveform monitoring method from a predetermined number or more of the sensor waveform data; and an abnormality sign detector configured to monitor a waveform of the sensor waveform data using each monitoring band for the sensor value axis and the time axis and detect an abnormality sign of the semiconductor manufacturing apparatus.Type: ApplicationFiled: June 17, 2021Publication date: December 23, 2021Inventors: Kazushi SHOJI, Shintaro SARUWATARI, Nobutoshi TERASAWA, Motokatsu MIYAZAKI
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Publication number: 20210011468Abstract: A substrate processing system includes: an acquiring unit configured to acquire process data of each step when each step included in a predetermined process is executed under different control conditions; an extracting unit configured to divide each step into a first section in which the process data fluctuates and a second section in which the process data is converged, and extract first data belonging to the first section and second data belonging to the second section from the process data; and a monitoring unit configured to monitor the process data by comparing one or both of an evaluation value that evaluates the first data and an evaluation value that evaluates the second data with corresponding upper and lower limit values.Type: ApplicationFiled: July 2, 2020Publication date: January 14, 2021Inventors: Nobutoshi TERASAWA, Noriaki KOYAMA, Tomonori YAMASHITA, Takazumi TANAKA, Takehiro KINOSHITA, Fumiaki NAGAI, Eiji KIKAMA
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Patent number: 9441292Abstract: Etching is performed through the following process. A substrate is loaded into a processing chamber and mounted on a mounting table therein. Then, in the state where a ring member at least a surface of which is made of a same material as a main component of an etching target film is provided to surround the substrate, a processing gas is injected in a shower-like manner from a gas supply unit oppositely facing the substrate and the etching target film is etched by using a plasma of the processing gas; and evacuating the inside of the processing chamber through an exhaust path. Through this process, unbalanced distribution of plasma active species in the vicinity of a circumferential edge portion of the substrate can be suppressed.Type: GrantFiled: January 14, 2015Date of Patent: September 13, 2016Assignee: TOKYO ELECTRON LIMITEDInventors: Ayuta Suzuki, Songyun Kang, Tsuyoshi Moriya, Nobutoshi Terasawa, Yoshiaki Okabe
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Publication number: 20150206763Abstract: Etching is performed through the following process. A substrate is loaded into a processing chamber and mounted on a mounting table therein. Then, in the state where a ring member at least a surface of which is made of a same material as a main component of an etching target film is provided to surround the substrate, a processing gas is injected in a shower-like manner from a gas supply unit oppositely facing the substrate and the etching target film is etched by using a plasma of the processing gas; and evacuating the inside of the processing chamber through an exhaust path. Through this process, unbalanced distribution of plasma active species in the vicinity of a circumferential edge portion of the substrate can be suppressed.Type: ApplicationFiled: January 14, 2015Publication date: July 23, 2015Applicant: TOKYO ELECTRON LIMITEDInventors: Ayuta Suzuki, Songyun Kang, Tsuyoshi Moriya, Nobutoshi Terasawa, Yoshiaki Okabe
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Patent number: 8945413Abstract: Etching is performed through the following process. A substrate is loaded into a processing chamber and mounted on a mounting table therein. Then, in the state where a ring member at least a surface of which is made of a same material as a main component of an etching target film is provided to surround the substrate, a processing gas is injected in a shower-like manner from a gas supply unit oppositely facing the substrate and the etching target film is etched by using a plasma of the processing gas; and evacuating the inside of the processing chamber through an exhaust path. Through this process, unbalanced distribution of plasma active species in the vicinity of a circumferential edge portion of the substrate can be suppressed.Type: GrantFiled: July 20, 2012Date of Patent: February 3, 2015Assignee: Tokyo Electron LimitedInventors: Ayuta Suzuki, Songyun Kang, Tsuyoshi Moriya, Nobutoshi Terasawa, Yoshiaki Okabe
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Publication number: 20130186858Abstract: Etching is performed through the following process. A substrate is loaded into a processing chamber and mounted on a mounting table therein. Then, in the state where a ring member at least a surface of which is made of a same material as a main component of an etching target film is provided to surround the substrate, a processing gas is injected in a shower-like manner from a gas supply unit oppositely facing the substrate and the etching target film is etched by using a plasma of the processing gas; and evacuating the inside of the processing chamber through an exhaust path. Through this process, unbalanced distribution of plasma active species in the vicinity of a circumferential edge portion of the substrate can be suppressed.Type: ApplicationFiled: July 20, 2012Publication date: July 25, 2013Applicant: TOKYO ELECTRON LIMITEDInventors: Ayuta SUZUKI, Songyun Kang, Tsuyoshi Moriya, Nobutoshi Terasawa, Yoshiaki Okabe
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Publication number: 20120169505Abstract: A life estimating method for a heater wire utilizes data obtained during a period (e.g., a temperature rising period), in which a sign of disconnection of the heater wire is likely to be seen. This method includes detecting a maximum magnitude value of electric power supplied to the heater wire during the temperature rising period for elevating the temperature to a heating temperature prior to providing a heating process to a wafer or wafers. The method further includes obtaining an index indicative of a magnitude of the amplitude of the electric power, and giving notice that the heater wire is approaching the end of its life when the indexes respectively indicate that the electric power magnitude and the amplitude magnitude exceed threshold values respectively.Type: ApplicationFiled: January 13, 2012Publication date: July 5, 2012Applicant: TOKYO ELECTRON LIMITEDInventors: Nobutoshi TERASAWA, Minoru Obata, Noriaki Koyama
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Patent number: 8121799Abstract: A method of estimating the life of a heater wire, including the steps of: detecting a maximum value of electric power supplied to the heater wire during a temperature rising period during which a temperature is elevated to a preset heating temperature, obtaining an index indicative of the amplitude of the electric power, and giving a notice that the heater wire is approaching the end of its life when the electric power and the index indicative of the of amplitude of the electric power exceed threshold values respectively provided thereto.Type: GrantFiled: April 15, 2008Date of Patent: February 21, 2012Assignee: Tokyo Electron LimitedInventors: Nobutoshi Terasawa, Minoru Obata, Noriaki Koyama
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Publication number: 20080262791Abstract: A life estimating method for a heater wire, which can estimate the life of the heater wire more appropriately than conventional one, by utilizing data obtained during a period (e.g., a temperature rising period), in which a sign of disconnection of the heater wire is likely to be seen, upon estimating the life in advance before the heater wire used in a heating apparatus is disconnected. This method comprises the steps of: detecting a maximum value of magnitude of electric power supplied to the heater wire during the temperature rising period provided for elevating the temperature up to a heating temperature, by supplying the electric power to the heater wire prior to providing a heating process to a wafer or wafers.Type: ApplicationFiled: April 15, 2008Publication date: October 23, 2008Inventors: Nobutoshi Terasawa, Minoru Obata, Noriaki Koyama