Patents by Inventor Norbert Greitschus

Norbert Greitschus has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8193856
    Abstract: An amplifier (V) for an integrated circuit amplifier circuit (IC) having a switched capacitor circuit (Cs, Cf) includes a capacitor for frequency compensation (CC1) that is connected in parallel to an amplifier stage (V2). This amplifier is advantageous because at least one second capacitor for frequency compensation (CC2) is selectively connected in parallel to the first capacitor for frequency compensation (CC1) via a switch controlled by a capacitor switching signal (clk).
    Type: Grant
    Filed: December 1, 2009
    Date of Patent: June 5, 2012
    Assignee: Trident Microsystems (Far East) Ltd.
    Inventors: José Manuel Garcia González, Norbert Greitschus
  • Publication number: 20100171551
    Abstract: An amplifier (V) for an integrated circuit amplifier circuit (IC) having a switched capacitor circuit (Cs, Cf) includes a capacitor for frequency compensation (CC1) that is connected in parallel to an amplifier stage (V2). This amplifier is advantageous because at least one second capacitor for frequency compensation (CC2) is selectively connected in parallel to the first capacitor for frequency compensation (CC1) via a switch controlled by a capacitor switching signal (clk).
    Type: Application
    Filed: December 1, 2009
    Publication date: July 8, 2010
    Inventors: José Manuel Garcia González, Norbert Greitschus
  • Patent number: 7330141
    Abstract: The invention relates to a compensation circuit (1–6) to compensate nonlinear distortions of an A/D converter comprising a signal input and a compensation system. In order to avoid the high costs related to the complex analog design of the A/D converter and/or the high energy consumption in this converter and compensation system, it is proposed that a compensation circuit be used that is composed of digital circuit elements that are connected following the A/D converter and which has a nonlinearly distorted output signal of the A/D converter supplied to it to compensate the nonlinear distortion. Adaptive coefficients are preferably employed here for the compensation.
    Type: Grant
    Filed: February 13, 2004
    Date of Patent: February 12, 2008
    Assignee: Micronas GmbH
    Inventors: Miodrag Temerinac, Norbert Greitschus
  • Patent number: 7123083
    Abstract: An at least second-order active filter circuit includes an operational amplifier (Op) whose frequency response, in conjunction with an RC network (R1, R2, C1, C2), serves to set a predetermined low-pass characteristic. The frequency response of the operational amplifier (Op) forms an integral part of this low-pass characteristic.
    Type: Grant
    Filed: January 5, 2004
    Date of Patent: October 17, 2006
    Inventors: Norbert Greitschus, Stefan Noe
  • Publication number: 20050030092
    Abstract: An at least second-order active filter circuit includes an operational amplifier (Op) whose frequency response, in conjunction with an RC network (R1, R2, C1, C2), serves to set a predetermined low-pass characteristic. The frequency response of the operational amplifier (Op) forms an integral part of this low-pass characteristic.
    Type: Application
    Filed: January 5, 2004
    Publication date: February 10, 2005
    Inventors: Norbert Greitschus, Stefan Noe
  • Publication number: 20040233083
    Abstract: The invention relates to a compensation circuit (1-6) to compensate nonlinear distortions of an A/D converter (A/D: analog-to-digital) comprising a signal input and a compensation system.
    Type: Application
    Filed: February 13, 2004
    Publication date: November 25, 2004
    Inventors: Miodrag Temerinac, Norbert Greitschus
  • Patent number: 6680645
    Abstract: An at least second-order active filter circuit includes an operational amplifier (Op) whose frequency response, in conjunction with an RC network (R1, R2, C1, C2), serves to set a predetermined low-pass characteristic. The frequency response of the operational amplifier (Op) forms an integral part of this low-pass characteristic.
    Type: Grant
    Filed: October 15, 2001
    Date of Patent: January 20, 2004
    Assignee: Micronas GmbH
    Inventors: Norbert Greitschus, Stefan Noe
  • Patent number: 6522115
    Abstract: A pulse-width-modulated DC-DC converter provides an output signal that is feedback to an error amplifier. The converter includes a comparator for comparing the output voltage of the error amplifier with the output voltage of a compensated ramp generator and having its output coupled to a switching transistor. The compensated ramp generator is designed so that the signal proportional to the current (IDrossel) through an inductor is superimposed on the ramp voltage so as to generate an output voltage having a sawtooth waveform with a concave rise.
    Type: Grant
    Filed: August 9, 1999
    Date of Patent: February 18, 2003
    Assignee: Micronas GmbH
    Inventor: Norbert Greitschus
  • Publication number: 20020101279
    Abstract: An at least second-order active filter circuit includes an operational amplifier (Op) whose frequency response, in conjunction with an RC network (R1, R2, C1, C2), serves to set a predetermined low-pass characteristic. The frequency response of the operational amplifier (Op) forms an integral part of this low-pass characteristic.
    Type: Application
    Filed: October 15, 2001
    Publication date: August 1, 2002
    Inventors: Norbert Greitschus, Stefan Noe
  • Patent number: 6411240
    Abstract: An amplifier has a first amplifier stage with a first input terminal to which an input signal is applied and with an output terminal that is connected to an input terminal of a second amplifier stage located downstream. The second amplifier stage provides an output signal that is fed back to a second input terminal of the first amplifier stage through a feedback path, which preferably contains a passive network. The amplification of this combination of the first and second amplifier stages with feedback depends essentially on the parameters of the network in the feedback path. The amplifier according to the invention also has a noise source that is connected in parallel with the first amplifier stage, and is also connected to the input terminal of the second amplifier stage. The level of a signal component at the output of the second amplifier stage depends on the parameters of the network in the feedback branch and the amplification of the first amplifier stage.
    Type: Grant
    Filed: January 7, 2000
    Date of Patent: June 25, 2002
    Assignee: Micronas GmbH
    Inventor: Norbert Greitschus
  • Patent number: 6166526
    Abstract: A DC/DC converter including a switching transistor, an inductor, a smoothing capacitor, and a switching element which are connected so as to convert an input voltage U.sub.E to an output voltage U.sub.A greater or less than the input voltage U.sub.E. The current through the inductor can be measured by providing a comparator having a first input connected to the switching transistor, and a second input connected to a reference transistor and a reference current source so as to fix the switching threshold of the comparator at the second input.
    Type: Grant
    Filed: March 19, 1999
    Date of Patent: December 26, 2000
    Assignee: Micronas Intermetall GmbH
    Inventor: Norbert Greitschus
  • Patent number: 6133767
    Abstract: An integrated driver circuit for driving different capacitive loads, which includes a setting element. The setting element develops a setting signal S for a given numerical measure signal M. The numerical measure signal M is developed by an input device, which is coupled to the setting element. The numerical measure signal M corresponds to one of the different capacitive loads which is driven by the driver circuit. Coupled to the setting element is an output stage, which provides an output current that corresponds to the setting signal S.
    Type: Grant
    Filed: November 16, 1995
    Date of Patent: October 17, 2000
    Assignee: Micronas Intermetall GmbH
    Inventors: Knut Caesar, Norbert Greitschus
  • Patent number: 5872504
    Abstract: A semiconductor structure for creating resistor networks, particularly ladder networks, has resistive sections made of semiconductor material and metal contact areas. A continuous semiconducting resistor strip is provided as a primary arm. Along this continuous primary arm, metal contact areas which contact the resistor strip at the side are provided in accordance with the desired resistor ratio and in order to form corresponding series resistors. In a ladder network, shunt arms have one end connected directly to the long side of the primary arm via the semiconductor material. At the other end of each of the shunt arms, a respective metal contact area is provided.
    Type: Grant
    Filed: January 13, 1997
    Date of Patent: February 16, 1999
    Assignee: Deutsche ITT Industries, GmbH
    Inventors: Norbert Greitschus, Hans-Gunter Zimmer
  • Patent number: 5805029
    Abstract: The invention relates to a digitally adjustable crystal oscillator having a quartz crystal and a monolithic integrated oscillator circuit including a series combination of a first frequency-adjusting capacitor C1 and a second frequency-adjusting capacitor C2 connected in parallel with the quartz crystal and comprising parallel-connected first capacitance stages and parallel-connected second capacitance stages, respectively, and an inverter circuit connected in parallel with the quartz crystal and comprising a feedback resistor R.sub.K, the output of the innverter circuit being connected to a load resistor. The inverter circuit comprises parallel-connected inverter stages, and switching elements are provided within the inverter stages and cqapacitor stages in such a way that a respective one of the inverter stages as well as a first capacitance stage C.sub.1i and a second capacitance stage C.sub.2i are switchable into or out of circuit by means of a control signal I.sub.i.
    Type: Grant
    Filed: May 22, 1997
    Date of Patent: September 8, 1998
    Assignee: ITT Manufacturing Enterprises, Inc.
    Inventors: Ulrich Theus, Norbert Greitschus