Abstract: A semiconductor structure can comprise a plurality of first semiconductor layers comprising wide bandgap semiconductor layers, a narrow bandgap semiconductor layer, and a chirp layer between the plurality of first semiconductor layers and the narrow bandgap semiconductor layer. The values of overlap integrals between different electron wavefunctions in a conduction band of the chirp layer can be less than 0.1 for intersubband transition energies greater than 1.0 eV, and/or the values of overlaps between electron wavefunctions and barrier centers in a conduction band of the chirp layer can be less than 0.4 nm?1, when the structure is biased at an operating potential. The chirp layer can comprise a short-period superlattice with alternating wide bandgap barrier layers and narrow bandgap well layers, wherein the thickness of the barrier layers, or the well layers, or the thickness of both the barrier and well layers changes throughout the chirp layer.

Abstract: Embodiments disclose LEDs that operate using impact ionization. Devices include a first conductivity type layer having a first conductivity type, a first intrinsic layer, a charge layer, an impact ionization layer, and a contact layer. The charge layer has a net charge of the first conductivity type and has a material comprising a polar oxide or a non-polar oxide. The charge layer forms a barrier for transporting carriers of the first conductivity type until a bias is applied between the first conductivity type layer and the contact layer to flatten the barrier.

Abstract: A semiconductor structure can comprise a plurality of first semiconductor layers comprising wide bandgap semiconductor layers, a narrow bandgap semiconductor layer, and a chirp layer between the plurality of first semiconductor layers and the narrow bandgap semiconductor layer. The values of overlap integrals between different electron wavefunctions in a conduction band of the chirp layer can be less than 0.05 for intersubband transition energies greater than 1.0 eV, and/or the values of overlaps between electron wavefunctions and barrier centers in a conduction band of the chirp layer can be less than 0.3 nm?1, when the structure is biased at an operating potential. The chirp layer can comprise a short-period superlattice with alternating wide bandgap barrier layers and narrow bandgap well layers, wherein the thickness of the barrier layers, or the well layers, or the thickness of both the barrier and well layers changes throughout the chirp layer.

Abstract: In some embodiments, a semiconductor structure comprises a semiconductor layer, a metal layer, and a contact layer adjacent to the metal layer, and between the semiconductor layer and the metal layer. The contact layer can comprise one or more piezoelectric materials comprising spontaneous piezoelectric polarization that depends on material composition and/or strain, and a region comprising a gradient in materials composition and/or strain adjacent to the metal layer. In some embodiments, a light emitting diode (LED) device comprises an n-doped short period superlattice (SPSL) layer, an intrinsically doped AlN/GaN SPSL layer adjacent to the n-doped SPSL layer, a metal layer, and an ohmic-chirp layer between the metal layer and the intrinsically doped AlN/GaN SPSL layer.

Abstract: Embodiments disclose LEDs that operate using impact ionization. Devices include a first conductivity type layer having a first conductivity type, a first intrinsic layer, a charge layer, an impact ionization layer, and a contact layer. The charge layer has a net charge of the first conductivity type and has a material comprising a polar oxide or a non-polar oxide. The charge layer forms a barrier for transporting carriers of the first conductivity type until a bias is applied between the first conductivity type layer and the contact layer to flatten the barrier.

Abstract: Embodiments disclose LEDs that operate using impact ionization. Devices include a first conductivity type layer, an intrinsic layer, and an impact ionization layer. In some embodiments, a charge layer is on the intrinsic layer, where the charge layer comprises a first material and has a net charge. The impact ionization layer comprises a second material. The charge layer forms a barrier for transporting carriers until a bias of at least 1.5 times a bandgap of the second material is applied, and a resulting electric field in the impact ionization layer is greater than or equal to a threshold for the second material. In some embodiments the first intrinsic layer is on the first conductivity type layer and is made of the first material, and a compositional step at an interface between the intrinsic layer and the impact ionization layer creates a barrier for transporting carriers.

Abstract: A semiconductor structure can comprise a plurality of first semiconductor layers comprising wide bandgap semiconductor layers, a narrow bandgap semiconductor layer, and a chirp layer between the plurality of first semiconductor layers and the narrow bandgap semiconductor layer. The values of overlap integrals between different electron wavefunctions in a conduction band of the chirp layer can be less than 0.05 for intersubband transition energies greater than 1.0 eV, and/or the values of overlaps between electron wavefunctions and barrier centers in a conduction band of the chirp layer can be less than 0.3 nm?1, when the structure is biased at an operating potential. The chirp layer can comprise a short-period superlattice with alternating wide bandgap barrier layers and narrow bandgap well layers, wherein the thickness of the barrier layers, or the well layers, or the thickness of both the barrier and well layers changes throughout the chirp layer.

Abstract: In some embodiments, a semiconductor structure comprises a semiconductor layer, a metal layer, and a contact layer adjacent to the metal layer, and between the semiconductor layer and the metal layer. The contact layer can comprise one or more piezoelectric materials comprising spontaneous piezoelectric polarization that depends on material composition and/or strain, and a region comprising a gradient in materials composition and/or strain adjacent to the metal layer. In some embodiments, a light emitting diode (LED) device comprises an n-doped short period superlattice (SPSL) layer, an intrinsically doped AlN/GaN SPSL layer adjacent to the n-doped SPSL layer, a metal layer, and an ohmic-chirp layer between the metal layer and the intrinsically doped AlN/GaN SPSL layer.

Abstract: A semiconductor structure can comprise a plurality of first semiconductor layers comprising wide bandgap semiconductor layers, a narrow bandgap semiconductor layer, and a chirp layer between the plurality of first semiconductor layers and the narrow bandgap semiconductor layer. The values of overlap integrals between different electron wavefunctions in a conduction band of the chirp layer can be less than 0.05 for intersubband transition energies greater than 1.0 eV, and/or the values of overlaps between electron wavefunctions and barrier centers in a conduction band of the chirp layer can be less than 0.3 nm?1, when the structure is biased at an operating potential. The chirp layer can comprise a short-period superlattice with alternating wide bandgap barrier layers and narrow bandgap well layers, wherein the thickness of the barrier layers, or the well layers, or the thickness of both the barrier and well layers changes throughout the chirp layer.

Abstract: Embodiments disclose LEDs that operate using impact ionization. Devices include a first conductivity type layer, an intrinsic layer, and an impact ionization layer. In some embodiments, a charge layer is on the intrinsic layer, where the charge layer comprises a first material and has a net charge. The impact ionization layer comprises a second material. The charge layer forms a barrier for transporting carriers until a bias of at least 1.5 times a bandgap of the second material is applied, and a resulting electric field in the impact ionization layer is greater than or equal to a threshold for the second material. In some embodiments the first intrinsic layer is on the first conductivity type layer and is made of the first material, and a compositional step at an interface between the intrinsic layer and the impact ionization layer creates a barrier for transporting carriers.

Abstract: A semiconductor structure can comprise a plurality of first semiconductor layers comprising wide bandgap semiconductor layers, a narrow bandgap semiconductor layer, and a chirp layer between the plurality of first semiconductor layers and the narrow bandgap semiconductor layer. The values of overlap integrals between different electron wavefunctions in a conduction band of the chirp layer can be less than 0.05 for intersubband transition energies greater than 1.0 eV, and/or the values of overlaps between electron wavefunctions and barrier centers in a conduction band of the chirp layer can be less than 0.3 nm?1, when the structure is biased at an operating potential. The chirp layer can comprise a short-period superlattice with alternating wide bandgap barrier layers and narrow bandgap well layers, wherein the thickness of the barrier layers, or the well layers, or the thickness of both the barrier and well layers changes throughout the chirp layer.

Abstract: Light emitting device and methods for forming the devices include a substrate and a nanowire placed on the substrate, where the nanowire comprises a core made of a semiconductor material. A cladding encloses the nanowire and has a breakdown voltage larger than a breakdown voltage of the core. A source of an electric field is provided, where the core is at least partially aligned with and lies at least partially within the electric field such that a cycling of the electric field creates charge separation and electron-hole recombination in the core.

Abstract: An excimer lamp includes a plurality of sheets and a plurality of spacers arranged to form a stack of a plurality of cells in comprising a plurality of chambers. The plurality of sheets includes a first outer sheet, a second outer sheet and a plurality of interior sheets. Each sheet in the plurality of sheets has an outer edge and comprises a material that is transmissive to a target wavelength. Each spacer is placed between two sheets and near the outer edge of each sheet. Each chamber is defined by a volume at least partially enclosed by the two sheets and at least one spacer. An emission material is within each chamber. A first electrode is coupled to the first outer sheet, exterior to the stack, and a second electrode is coupled to the second outer sheet, exterior to the stack. A method of manufacturing the excimer lamp is also disclosed.

Abstract: Light emitting device and methods for forming the devices include a substrate and a nanowire placed on the substrate, where the nanowire comprises a core made of a semiconductor material. A cladding encloses the nanowire and has a breakdown voltage larger than a breakdown voltage of the core. A source of an electric field is provided, where the core is at least partially aligned with and lies at least partially within the electric field such that a cycling of the electric field creates charge separation and electron-hole recombination in the core.

Abstract: Various ultraviolet (UV) reactors and their methods of fabrication are disclosed. One exemplary process comprises forming a set of parallel channels in a slab of ultraviolet transparent material. The process also comprises providing a reactor substrate with an input manifold and an output manifold. The process also comprises joining the slab of ultraviolet transparent material and the reactor substrate. The input manifold, output manifold, and set of parallel channels are in fluid communication after the joining step. The process also comprises providing a planar ultraviolet light source isolated from the set of parallel channels by the shaped slab of ultraviolet-transparent material. The set of parallel channels and a defining plane of the planar ultraviolet light source are parallel in the assembled ultraviolet reactor.

Abstract: An electronic circuit structure is formed with first and second dies bonded together. A first active layer is formed in the first die, and a second active layer is formed in the second die. The first and second dies are bonded together, with an isolation capacitor, through which the first and second active layers communicate, disposed between the first and second dies.

Abstract: Various ultraviolet (UV) reactors and their methods of fabrication are disclosed. One exemplary process comprises forming a set of parallel channels in a slab of ultraviolet transparent material. The process also comprises providing a reactor substrate with an input manifold and an output manifold. The process also comprises joining the slab of ultraviolet transparent material and the reactor substrate. The input manifold, output manifold, and set of parallel channels are in fluid communication after the joining step. The process also comprises providing a planar ultraviolet light source isolated from the set of parallel channels by the shaped slab of ultraviolet-transparent material. The set of parallel channels and a defining plane of the planar ultraviolet light source are parallel in the assembled ultraviolet reactor.

Abstract: An electronic circuit structure is formed with first and second dies bonded together. A first active layer is formed in the first die, and a second active layer is formed in the second die. The first and second dies are bonded together, with an isolation capacitor, through which the first and second active layers communicate, disposed between the first and second dies.

Abstract: A position sensor has at least one guide rail for a guide housing having a magnetic component. On the guide housing, an encapsulation is accommodated which electrically insulates and/or fixes a lead frame assembly and/or a circuit trace assembly. It forms a retainer for the magnetic component.

Abstract: A position sensor has at least one guide rail for a guide housing having a magnetic component. On the guide housing, an encapsulation is accommodated which electrically insulates and/or fixes a lead frame assembly and/or a circuit trace assembly. It forms a retainer for the magnetic component.