Abstract: Conventional multistage oil pumps could not have been used in an application where the pressure and the temperature are high. A multistage oil pump including two rotors that are connected in series in the direction of the rotation axis, wherein the respective rotors are accommodated in a rotor case separately across a spacer, the inside thereof being partitioned by the spacer part. The rotor case is in the form of an integral cylindrical part, and the spacer is integral with the rotor case. The rotors and the rotor case are made of a ferrous material, and the rotor case is fixed to a housing by positioning pins.

Abstract: An oil pump including an upstream pump unit including an upstream inner rotor and an upstream outer rotor; a downstream pump unit including a downstream inner rotor and a downstream outer rotor as being arranged adjacently to the upstream pump unit in a predetermined axis line direction; a rotary shaft concurrently rotating the upstream inner rotor and the downstream inner rotor; and a housing which contains the upstream pump unit and the downstream pump unit as supporting the rotary shaft and which includes an inlet port for sucking oil from the outside into the upstream pump unit, an ejection port for ejecting a part thereof to the outside in a pressurization process of the upstream pump unit, a communication port for providing communication between the upstream pump unit and the downstream pump unit, and a discharge port for discharging oil from the downstream pump unit to the outside.

Abstract: A multi-strobe circuit that latches a signal to be tested, an evaluation target, at each edge timing of a multi-strobe signal having a plurality of edges. An oscillator oscillates at a predetermined frequency in synchronization with a reference strobe signal. A latch circuit latches the signal to be tested at an edge timing of an output signal of the oscillator. A gate circuit is provided between a clock terminal of the latch circuit and the oscillator, and makes the output signal of the oscillator pass therethrough for a predetermined period. A clock transfer circuit loads the output signal of the latch circuit at an edge timing of the output signal of the oscillator and performs retiming on the output signal of the latch circuit by using a reference clock.

Abstract: A multi-strobe circuit that latches a signal to be tested, an evaluation target, at each edge timing of a multi-strobe signal having a plurality of edges. An oscillator oscillates at a predetermined frequency in synchronization with a reference strobe signal. A latch circuit latches the signal to be tested at an edge timing of an output signal of the oscillator. A gate circuit is provided between a clock terminal of the latch circuit and the oscillator, and makes the output signal of the oscillator pass therethrough for a predetermined period. A clock transfer circuit loads the output signal of the latch circuit at an edge timing of the output signal of the oscillator and performs retiming on the output signal of the latch circuit by using a reference clock.

Abstract: There is provided a test apparatus that tests a device under test including a plurality of data terminals and a clock output terminal, the test apparatus including a plurality of first variable delay circuits that delays a reference clock, a plurality of timing clock generating sections that outputs a timing clock having a phase obtained by shifting a phase of the delayed reference clock by a designated phase shift amount, a timing comparator that acquires a data signal in accordance with the timing clock, a plurality of second variable delay circuits that delays the timing clock, a plurality of phase comparators that outputs a phase shift amount according to a phase difference between a clock signal and the timing clock, a first adjusting section that adjusts a delay amount of the first variable delay circuit so that the timing comparator acquires a data signal based on the timing clock, and a second adjusting section that adjusts a delay amount of the second variable delay circuit so that the timing compara

Abstract: There is provided a clock transferring apparatus for synchronizing a pattern signal synchronized with a reference clock with a variable clock based on an oscillation source different from that of the reference clock, having a rate clock generating section for generating a rate clock whose number of pulses within a predetermined period is almost equal with a number of pulses of the variable clock within the predetermined period by thinning out the pulses within the reference clock, a pattern generating section for generating the pattern signal corresponding to the pulses of the rate clock and a FIFO memory that stores data of the pattern signal corresponding to the pulses of the rate clock and outputs the stored data corresponding to the pulses of the variable clock.

Abstract: A test device includes: the first reference clock generation unit for generating the first reference clock; the first test rate generation unit for generating the first test rate clock based on the first reference clock; the first driver unit for supplying the first test pattern to an electronic device based on the first test rate clock; the second reference clock generation unit for generating the second reference clock; the first phase synchronization unit for synchronizing the phase of the second reference clock with the phase of the first test rate clock; the second test rate generation unit for generating the second test rate clock based on the second reference clock having the synchronized phase; and the second driver unit for supplying the second test pattern to the electronic device based on the second test rate clock.

Abstract: There is provided an electric circuit that outputs a timing signal and a recovered clock.

Abstract: There is provided an electric circuit that outputs a timing signal and a recovered clock.

Abstract: There is provided a test apparatus that tests a device under test including a plurality of data terminals and a clock output terminal, the test apparatus including a plurality of first variable delay circuits that delays a reference clock, a plurality of timing clock generating sections that outputs a timing clock having a phase obtained by shifting a phase of the delayed reference clock by a designated phase shift amount, a timing comparator that acquires a data signal in accordance with the timing clock, a plurality of second variable delay circuits that delays the timing clock, a plurality of phase comparators that outputs a phase shift amount according to a phase difference between a clock signal and the timing clock, a first adjusting section that adjusts a delay amount of the first variable delay circuit so that the timing comparator acquires a data signal based on the timing clock, and a second adjusting section that adjusts a delay amount of the second variable delay circuit so that the timing compara

Abstract: A valve apparatus is small, and regulates a fuel amount by restricting a lift amount of a valve. A columnar portion is formed on a pump body. The columnar portion is inserted into a check valve and a washer formed with a protruding portion which protrudes outward from a flange portion, and the check valve and washer are attached or fixed to the pump body by subjecting a tip end of the columnar portion to thermal caulking or the like. An outer diameter of the protruding portion is set to be relatively smaller than an outer diameter of the flange portion such that when the check valve is sandwiched between the protruding portion and pump body, the check valve contacts an outer peripheral edge of the flange portion when the check valve opens. As a result, a lift amount of the valve can be restricted, and a flow rate of fuel passing through a passage can be maintained at a constant level.

Abstract: A timing generation circuit can increase a maximum delay amount without changing the configuration of a timing memory. The timing generation circuit includes: a timing memory (TMM) 10 containing predetermined timing data; a plurality of down counters 20 for loading the timing data from the TMM and outputting a pulse signal at the timing indicated by the timing data; an address selection circuit 40 for specifying one or two TMM addresses by switching and outputting corresponding one or plural timing data; a load data switching circuit 50 for loading the plural timing data to the plural down counters cascaded and outputting one timing pulse signal; and a timing data selection circuit 60 for selecting one of the pulse signals. The plural timing data are generated by dividing the timing memory into a plurality of memory regions either in a column or row direction.

Abstract: There is provided a test apparatus including a PLL circuit for generating a strobe signal of which the timing is shifted according to a given delay control voltage, a variable delay circuit being provided divergently from a path connecting the PLL circuit and the timing comparator and delaying the strobe signal according to the predetermined phase difference of the strobe signal for the output signal, and a first phase comparing unit for comparing a phase of the strobe signal output from the variable delay circuit and a phase of the output signal output from the device under test and supplying the delay control voltage according to the phase difference to the PLL circuit.

Abstract: There is provided a test apparatus including a PLL circuit for generating a strobe signal of which the timing is shifted according to a given delay control voltage, a variable delay circuit being provided divergently from a path connecting the PLL circuit and the timing comparator and delaying the strobe signal according to the predetermined phase difference of the strobe signal for the output signal, and a first phase comparing unit for comparing a phase of the strobe signal output from the variable delay circuit and a phase of the output signal output from the device under test and supplying the delay control voltage according to the phase difference to the PLL circuit.

Abstract: There is provided a clock transferring apparatus for synchronizing a pattern signal synchronized with a reference clock with a variable clock based on an oscillation source different from that of the reference clock, having a rate clock generating section for generating a rate clock whose number of pulses within a predetermined period is almost equal with a number of pulses of the variable clock within the predetermined period by thinning out the pulses within the reference clock, a pattern generating section for generating the pattern signal corresponding to the pulses of the rate clock and a FIFO memory that stores data of the pattern signal corresponding to the pulses of the rate clock and outputs the stored data corresponding to the pulses of the variable clock.

Abstract: The present invention provides a valve apparatus which is small and reasonably priced, and with which a fuel amount can be regulated by restricting the lift amount of a valve. A columnar portion 60 is formed in a body 16, the columnar portion 60 is inserted into a valve 44, 46 and a washer 62 formed with a protruding portion 72 which protrudes outward from a flange portion 64, and the check valve 44, 46 and washer 62 are attached or fixed to the pump body 16 by subjecting the tip end of the columnar portion 60 to thermal caulking or the like. The outer diameter of the protruding portion 72 is set to be relatively smaller than the outer diameter of the flange portion 64 such that when the check valve 44, 46 is sandwiched between the protruding portion 72 and pump body 16, the check valve 44, 46 contacts an outer peripheral edge 70 of the flange portion 64 when the check valve 44, 46 opens.

Abstract: A fuel cell system in which water can be accurately supplied in accordance with the flow rate of fuel gas supplied to the reformer to allow efficient reforming without using a flow meter measuring the flow rate of water. In the fuel cell system in which fuel gas is supplied to a reformer where steam reforming is carried out to convert the fuel gas to hydrogen rich gas, and the hydrogen rich gas is supplied to a fuel cell unit to generate electricity, the pump that supplies water to the reformer is a plunger pump in which the rate of discharge of water is proportional to the rate of rotation of the motor that drives the pump. Also the fuel cell system includes a gas flow rate sensor to measure the flow rate of fuel gas supplied to the reformer, and a controller that controls the rate of rotation of the motor in accordance with the value of flow rate measured by the gas flow rate sensor.

Abstract: A timing generation circuit can increase a maximum delay amount without changing the configuration of a timing memory. The timing generation circuit includes: a timing memory (TMM) 10 containing predetermined timing data; a plurality of down counters 20 for loading timing data output from the TMM and outputting a pulse signal at the timing indicated by the timing data; an address selection circuit 40 for specifying one or two TMM addresses by switching and outputting corresponding one or two timing data; a load data switching circuit 50 used when two timing data are output from the TMM, for loading the two timing data to the two down counters cascaded and outputting one timing pulse signal; and a timing data selection circuit 60 for selecting one of the pulse signals based on the one or two timing data output from the down counter.

Abstract: A test device includes: the first reference clock generation unit for generating the first reference clock; the first test rate generation unit for generating the first test rate clock based on the first reference clock; the first driver unit for supplying the first test pattern to an electronic device based on the first test rate clock; the second reference clock generation unit for generating the second reference clock; the first phase synchronization unit for synchronizing the phase of the second reference clock with the phase of the first test rate clock; the second test rate generation unit for generating the second test rate clock based on the second reference clock having the synchronized phase; and the second driver unit for supplying the second test pattern to the electronic device based on the second test rate clock.

Abstract: In order to provide a fuel pump in which a piston spring arrangement can be made of inexpensive material, knocking noises of a piston are reduced, and components related to the piston are protected against breakdown, a piston-following spring is provided between a fuel pump body and the piston to lower the piston in response to the rotation of an eccentric cam. A pumping member-moving spring is provided between the fuel pump body and a pin connected to a pumping member, and lowers the pumping member when the piston is moved down. The downward movements of the piston and the pumping member are caused by the springs, so that these springs can be made of inexpensive materials, and enable the piston to reliably follow the eccentric cam.