Abstract: When an exchange detects that a wireless base station is connected to an extension interface, the exchange outputs a sync signal to a communication channel of the extension interface. Based on the sync signal received through the communication channel, the wireless base station outputs a radio signal so as to communicate with a wireless handset based on the sync signal.

Abstract: A chain guide member used in a chain transmission apparatus, and manufacturing method and apparatus thereof. The chain guide member has a sliding contact section extending along a traveling surface of a chain and coming into sliding contact with the chain, and a reinforcement main body reinforcing and supporting the sliding contact section along the traveling surface of the chain. A part or all of a joint portion between the sliding contact section and the reinforcement main body is joined by melting.

Abstract: A chain guide member used in a chain transmission apparatus, and manufacturing method and apparatus thereof. The chain guide member has a sliding contact section extending along a traveling surface of a chain and coming into sliding contact with the chain, and a reinforcement main body reinforcing and supporting the sliding contact section along the traveling surface of the chain. A part or all of a joint portion between the sliding contact section and the reinforcement main body is joined by melting.

Abstract: A polyamide resin containing reinforcing fiber is dry blended with a polyamide resin containing no or less reinforcing fiber. A polyamide resin containing 15 to 50% by weight of reinforcing fiber thus obtained is used as a material. By using a moving type core having a two-stage structure including a large diameter moving core and a small diameter moving core, a tubular hollow molded body 17 is formed, and redundant portions 18 and 19 are cut and removed.

Abstract: A semiconductor memory device operable for reading and writing in a normal mode and in a test mode is divided into memory cell sections each having blocks of memory cells. Data bus lines are connected to the respective blocks, and switches interconnect data bus lines connected to blocks of the different sections. The switch are made conductive during reading and writing in the normal mode and during writing in the test mode, and nonconductive during reading in the test mode. Input data are applied onto the data bus lines connected one of the blocks for writing in the blocks of the sections simultaneously during writing in the normal mode and in the test mode. In the normal mode, data are read out of the blocks of the sections through the data bus lines connected to the above-mentioned one of the blocks. In the test mode, the data are read out of the blocks of the sections through the data bus lines connected to the respective blocks.

Abstract: A semiconductor memory device operable for reading and writing in a normal mode and in a test mode is divided into memory cell sections each having blocks of memory cells. Data bus lines are connected to the respective blocks, and switches interconnect data bus lines connected to blocks of the different sections. The switch are made conductive during reading and writing in the normal mode and during writing in the test mode, and nonconductive during reading in the test mode. Input data are applied onto the data bus lines connected one of the blocks for writing in the blocks of the sections simultaneously during writing in the normal mode and in the test mode. In the normal mode, data are read out of the blocks of the sections through the data bus lines connected to the above-mentioned one of the blocks. In the test mode, the data are read out of the blocks of the sections through the data bus lines connected to the respective blocks.

Abstract: A semiconductor memory device operable for reading and writing in a normal mode and in a test mode is divided into memory cell sections each having blocks of memory cells. Data bus lines are connected to the respective blocks, and switches interconnect data bus lines connected to blocks of the different sections. The switch are made conductive during reading and writing in the normal mode and during writing in the test mode, and nonconductive during reading in the test mode. Input data are applied onto the data bus lines connected to one of the blocks for writing in the blocks of the sections simultaneously during writing in the normal mode and in the test mode. In the normal mode, data are read out of the blocks of the sections through the data bus lines connected to the above-mentioned one of the blocks. In the test mode, the data are read out of the blocks of the sections through the data bus lines connected to the respective blocks.

Abstract: Al.sub.100-a-b-c X.sub.a M.sub.b T.sub.c, in which X is Y (yttrium) and/or rare-earth element(s), M is Fe, Co, and/or Ni, and T is Mn, Mo, Cr, Zr and/or V, and, a=0.5-5 atomic %, b=5-15 atomic %, and c=0.2-3.0 atomic %, and, further, X and M fall on and within the hatched region range of the appended FIG. 1, has a complex, amorphous-crystalline structure with an amorphous matrix containing the Al, X, M and T, and minority crystalline phase consisting of aluminum-alloy particles containing super-saturated X, M and T as solutes. The alloy has a high strength due to the dispersed crystalline particles.

Abstract: A high strength and high toughness aluminum alloy is produced by crystallization of one of two aluminum alloy blanks: one having a metallographic structure with a volume fraction Vf of a mixed-phase texture consisting of an amorphous phase and an aluminum crystalline phase being equal to or more than 50% (Vf.gtoreq.50%), and the other having a metallographic structure with a volume fraction Vf of an amorphous single-phase texture being equal to or more than 50% (Vf.gtoreq.50%). The aluminum alloy is represented by a chemical formula:Al.sub.(a) X.sub.(b) Z.sub.(c) Si.sub.(d)wherein X is at least one element selected from the group consisting of Mn, Fe, Co and Ni; Z is at least one element selected from the group consisting of Zr and Ti; and each of (a), (b), (c) and (d) is defined within the following range:84 atomic %.ltoreq.(a).ltoreq.94 atomic %,4 atomic %.ltoreq.(b).ltoreq.atomic %,0.6 atomic %.ltoreq.(c).ltoreq.4 atomic %, and0.5 atomic %.ltoreq.(d).ltoreq.(b)/3.

Abstract: A process for producing an aluminum alloy with high strength and toughness includes the steps of: preparing an alloy blank having a primary structure which is one selected from a single-phase structure comprised of a solid-solution phase, a single-phase structure comprised of an amorphous phase, and a mixed-phase structure comprised of a solid-solution phase and an amorphous phase, and subjecting the alloy blank to a thermal treatment to provide an aluminum alloy which has a secondary structure containing 20% or more by volume fraction Vf of chrysanthemum-like patterned phases each having a diameter of at most 5 .mu.m and comprising a solid-solution phase and an intermetallic compound phase arranged radiately.

Abstract: An aluminum-based alloy foil or thin aluminum-based alloy wire is produced from an amorphous material made by a quenching and solidifying process and having a composition represented by the general formula:Al.sub.a M.sub.b X.sub.cwherein M is one or more elements selected from a group consisting of V, Cr, Mn, Fe, Co, Ni, Cu, Zr, Ti, Mo, W, Ca, Li, Mg and Si; X is one or more elements selected from a group consisting of Y, Nb, Hf, Ta, La, Ce, Sm, Nd and Mm (misch metal); and a, b, and c are atomic percentages falling within the following range:50.ltoreq.a.ltoreq.950.5.ltoreq.b.ltoreq.35 and0.5.ltoreq.c.ltoreq.25Such foil or wire has a smooth surface and a very small and uniform foil thickness or wire diameter, contains at least 50% by volume of an amorphous phase, and has excellent strength and resistance to corrosion. The foil thickness and wire diameter are reduced in a rolling or drawing process at an elevated temperature over a short time period.

Abstract: A semiconductor memory device operable for reading and writing in a normal mode and in a test mode is divided into memory cell sections each having blocks of memory cells. Data bus lines are connected to the respective blocks, and switches interconnect data bus lines connected to blocks of the different sections. The switch are made conductive during reading and writing in the normal mode and during writing in the test mode, and nonconductive during reading in the test mode. Input data are applied onto the data bus lines connected one of the blocks for writing in the blocks of the sections simultaneously during writing in the normal mode and in the test mode. In the normal mode, data are read out of the blocks of the sections through the data bus lines connected to the above-mentioned one of the blocks. In the test mode, the data are read out of the blocks of the sections through the data bus lines connected to the respective blocks.

Abstract: A semiconductor logic circuit apparatus which include a first switching element consisting of a field effect transistor for changing holding data, an inverter circuit whose input is connected with one end of the first switching element, a feedback circuit whose input and output are connected with the output and input of the inverter circuit, and a second switching element connected between the output of the feedback circuit and first or second potential. The second switching element is effective for enabling and disabling the feedback circuit.The first and second switching elements are opened/closed in reverse phase to each other. Feedback of the feedback circuit is prevented until the inverter circuit is driven from its "0" to its "1" holding state, so that driving of the inverter circuit becomes easy and operational stability and operating speed are enhanced.

Abstract: A solidified amorphous alloy material is produced from a melt of its desired metal material. A melt feeding route is provided with a first-stage quenching zone. The melt is quenched to a predetermined temperature in the first-stage quenching zone. The thus-quenched melt is then introduced into a second-stage quenching and solidification zone, whereby the melt is cooled further and solidified into a solidified material having an amorphous phase.

Abstract: A semiconductor memory device includes a plurality of ports enabling simultaneous writing and reading of data of M words.times.N bits. A plurality of memory cells are arranged in (M/n) rows.times.(n.times.N) columns in a memory call array, write and read word lines are commonly connected to the memory cells of one row, and write column selecting line are connected to every n (the number of words) memory cells of the memory cells of one row. Write and read bit lines are connected to the memory cells of one column. Data is input to the write bit line from an input terminal through a write circuit. and data read from the memory cell is output to an output terminal through a sense amplifier. A first port is formed by the write word lines, the write column selecting lines, the write bit lines and the input terminal, and a second port is formed by the read word lines, read bit lines and the output terminal. M, N and n are natural numbers and M, N.gtoreq.n.

Abstract: In a metal-oxide semiconductor (MOS) dynamic formed on a semiconductor substrate, data nodes of a first flip-flop are connected to a first pair of folded bit lines. Its power supply node is connected through a switch to a first power supply (Vss). Data nodes of a second flip-flop are connected to a second pair of folded bit lines. Its power supply node is connected through a switch to the first power supply (Vss). A power supply node of a third flip-flop is connected through a switch to a second power supply (Vcc). Data nodes of the third flip-flop are coupled through a first pair of transfer gates to the first pair of the folded bit lines, and through a second pair of transfer gates to the second pair of the folded bit lines. Coupling the first to the third flip-flops forms a first sense amplifier and coupling the second to the third flip-flops forms a second sense amplifier.

Abstract: A heat resistant slide member for an internal combustion engine is a plastically worked member formed from a quenched and solidified aluminum alloy, with a metal flow line in a sliding portion thereof set in a sliding direction. The aluminum alloy contains at least one selected from the group consisting of Cr, Fe, Zr and Ti in an amount of 5% or more and 30% by weight or less and has an average diameter of precipitates and crystallizates therein of 50 .mu.m or less and a tensile strength at 300.degree. C. of 18 kg/mm.sup.2 or more.

Abstract: A heat-resistant aluminum alloy sinter comprises 5 to 12% by weight of Cr, less than 10% by weight of at least one selected from the group consisting of Co, Ni, Mn, Zr, V, Ce, Fe, Ti, Mo, La, Nb, Y and Hf, and the balance of Al containing unavoidable impurities. A silicon carbide fiber is included for reinforcing the sinter in a fiber volume fraction range of 2 to 30%.

Abstract: In a dynamic random access semiconductor memory device comprising a sense amplifier and two pairs of bit lines sharing the sense amplifiers, each of the bit lines having a plurality of memory cells connected thereto, when a memory cell connected to one of the bit-line pairs is selected, the memory cells connected to the other bit-line pair are not connected to the sense amplifier, and, during a refresh cycle for rewriting data into a selected memory cell connected to a bit line of one of the bit-line pairs, the bit lines of the other bit-line pair are disconnected from the sense amplifier.

Abstract: A semiconductor memory device operable for reading and writing in a normal mode and in a test mode is divided into memory cell sections each having blocks of memory cells. Data bus lines are connected to the respective blocks, and switches interconnect data bus lines connected to blocks of the different sections. The switches are made conductive during reading and writing in the normal mode and during writing in the test mode, and nonconductive during reading in the test mode. Input data are applied onto the data bus lines connected to one of the blocks for writing in the blocks of the sections simultaneously during writing in the normal mode and in the test mode. In the normal mode, data are read out of the blocks of the sections through the data bus lines connected to the above-mentioned one of the blocks. In the test mode, the data are read out of the blocks of the sections through the data bus lines connected to the respective blocks.