Abstract: After a field oxide film is formed on a P-type semiconductor substrate, ion implantation of boron is carried out with respect to a whole surface of the substrate so that a channel stopper layer is formed. Then, a MOS FET is formed in an active region of the semiconductor substrate. Subsequently, ion implantation of phosphorus is carried out, by using a gate electrode of the MOS FET and the field oxide film as a mask, so that impurity layers which have the same type of conductivity as that of the channel stopper layer and has a concentration lower than that of the channel stopper layer are formed right under the source/drain regions of the MOS FET between the source/drain regions and the channel stopper layer.

Abstract: A method of producing a semiconductor device having a LDD structure using a semiconductor substrate laminated with an insulating film, a polysilicon layer, and a first conductive layer where the first conductive layer is formed of a high melting point metal and the first conductive layer and polysilicon layer are removed in the region other than a gate pattern formation region but without exposing the insulating layer. After implanting the semiconductor substrate with a first impurity, the residual polysilicon layer in the region other than the gate pattern formation region along with a polysilicon layer sidewall in the gate pattern formation region are converted into a silicon oxide layer by subjecting to oxidation treatment, and the semiconductor substrate is laminated with a second conductive layer.

Abstract: A non-volatile programmable memory having:a plurality of unit cells disposed therein, each of said unit cells including an anti-fuse that can write in data by electrically breaking down an insulating film, a select transistor individually connected to said anti-fuse, and a wiring connected to each anti-fuse; andan auxiliary transistor connected between mutually adjacent unit cells, said auxiliary transistor having a source region and a drain region respectively connected between said anti-fuse and said select transistor together incorporated in mutually adjacent unit cells.