Abstract: The reliability of an electronic device is improved. An electronic device has a wiring substrate and a housing made of a metal for supporting the wiring substrate. A semiconductor device having a switching power transistor is mounted at the wiring substrate. A ground pattern of a conductive film and a heat radiation pattern of a conductive film are formed at the wiring substrate. The heat radiation pattern is not electrically coupled with any electronic component mounted at the wiring substrate, and is also not electrically coupled with the ground pattern. The ground pattern overlaps the semiconductor device in the thickness direction of the wiring substrate. The heat radiation pattern overlaps the ground pattern in the thickness direction of the wiring substrate, and overlaps a region where the housing and the wiring substrate are in contact with each other.

Abstract: A first semiconductor device having a power transistor for switching is mounted on a power wiring substrate PB1; a semiconductor device PKG6 having a driving circuit for driving the first semiconductor device and a semiconductor device PKG5 having a control circuit for controlling the semiconductor device PKG6 are mounted on a first principal surface of a control wiring substrate PB2; and a semiconductor device PKG4 having a regulator circuit is mounted on a second principal surface of the control wiring substrate PB2. On the first principal surface of the control wiring substrate PB2, the semiconductor device PKG5 and the semiconductor device PKG6 are mounted in a second area out of the second area and a third area adjacent to each other via a first area in which a plurality of holes HC3 are arranged.

Abstract: An electronic device has a control board having a plurality of wiring layers, a metal-made housing supporting the control board, and a fixing screw for fixing the control board to the housing through a washer. The control board includes a through hole penetrating from a third surface to a fourth surface, a through electrode formed inside the through hole, and a power system GND pattern formed on any wiring layer of the wiring layers. The power system GND pattern and the housing are electrically coupled through the through electrode, the washer, and the fixing screw.

Abstract: An electronic device is downsized while suppressing performance degradation of the electronic device. In the electronic device, a power module including a power transistor is arranged in a first region on a back surface of a through hole board having a plurality of through hole vias having different sizes while a pre-driver including a control circuit is arranged in a second region on a front surface of the board. In this case, in a plan view, the first region and the second region have an overlapping region. The power module and the pre-driver are electrically connected to each other via a through hole via. The plurality of through hole vias include a through hole via having a first size, a through hole via which is larger than the first size and in which a cable can be inserted, and a through hole via in which a conductive member is embedded.

Abstract: A plurality of semiconductor devices each including a semiconductor chip having a high-side MOSFET and a semiconductor chip having a low-side MOSFET are mounted on a wiring board (PB1). The wiring board (PB1) includes a power supply wiring WV1 to which a power supply potential is supplied and output wirings WD1, WD2, and WD3 electrically connecting a low-side drain terminal of each of the plurality of semiconductor devices to a plurality of output terminals. A minimum value and a maximum value of a current path width in the power supply wiring WV1 are referred to as a first minimum width and a first maximum width, respectively, and a minimum value and a maximum value of a current path width in the output wirings WD1, WD2, and WD3 are referred to as a second minimum width and a second maximum width, respectively.

Abstract: The reliability of an electronic device is improved. An electronic device has a wiring substrate and a housing made of a metal for supporting the wiring substrate. A semiconductor device having a switching power transistor is mounted at the wiring substrate. A ground pattern of a conductive film and a heat radiation pattern of a conductive film are formed at the wiring substrate. The heat radiation pattern is not electrically coupled with any electronic component mounted at the wiring substrate, and is also not electrically coupled with the ground pattern. The ground pattern overlaps the semiconductor device in the thickness direction of the wiring substrate. The heat radiation pattern overlaps the ground pattern in the thickness direction of the wiring substrate, and overlaps a region where the housing and the wiring substrate are in contact with each other.

Abstract: A plurality of semiconductor devices each including a semiconductor chip having a high-side MOSFET and a semiconductor chip having a low-side MOSFET are mounted on a wiring board (PB1). The wiring board (PB1) includes a power supply wiring WV1 to which a power supply potential is supplied and output wirings WD1, WD2, and WD3 electrically connecting a low-side drain terminal of each of the plurality of semiconductor devices to a plurality of output terminals. A minimum value and a maximum value of a current path width in the power supply wiring WV1 are referred to as a first minimum width and a first maximum width, respectively, and a minimum value and a maximum value of a current path width in the output wirings WD1, WD2, and WD3 are referred to as a second minimum width and a second maximum width, respectively.

Abstract: A first semiconductor device having a power transistor for switching is mounted on a power wiring substrate PB1; a semiconductor device PKG6 having a driving circuit for driving the first semiconductor device and a semiconductor device PKG5 having a control circuit for controlling the semiconductor device PKG6 are mounted on a first principal surface of a control wiring substrate PB2; and a semiconductor device PKG4 having a regulator circuit is mounted on a second principal surface of the control wiring substrate PB2. On the first principal surface of the control wiring substrate PB2, the semiconductor device PKG5 and the semiconductor device PKG6 are mounted in a second area out of the second area and a third area adjacent to each other via a first area in which a plurality of holes HC3 are arranged.

Abstract: An electronic device is downsized while suppressing performance degradation of the electronic device. In the electronic device, a power module including a power transistor is arranged in a first region on a back surface of a through hole board having a plurality of through hole vias having different sizes while a pre-driver including a control circuit is arranged in a second region on a front surface of the board. In this case, in a plan view, the first region and the second region have an overlapping region. The power module and the pre-driver are electrically connected to each other via a through hole via. The plurality of through hole vias include a through hole via having a first size, a through hole via which is larger than the first size and in which a cable can be inserted, and a through hole via in which a conductive member is embedded.

Abstract: An electronic device has a control board having a plurality of wiring layers, a metal-made housing supporting the control board, and a fixing screw for fixing the control board to the housing through a washer. The control board includes a through hole penetrating from a third surface to a fourth surface, a through electrode formed inside the through hole, and a power system GND pattern formed on any wiring layer of the wiring layers. The power system GND pattern and the housing are electrically coupled through the through electrode, the washer, and the fixing screw.

Abstract: To achieve the reduction in size of an electronic device. The electronic device serving as an element of a wireless communication system includes a module unit, a battery that supplies electric power to the module unit, and a coupling part that electrically couples the module unit and the battery. The module unit includes a sensor that detects a physical quantity, and a wireless communication unit configured to transmit the data based on an output signal from the sensor.

Abstract: To achieve the reduction in size of an electronic device. The electronic device serving as an element of a wireless communication system includes a module unit, a battery that supplies electric power to the module unit, and a coupling part that electrically couples the module unit and the battery. The module unit includes a sensor that detects a physical quantity, and a wireless communication unit configured to transmit the data based on an output signal from the sensor.

Abstract: There is provided a method for manufacturing a semiconductor device, including: forming an interconnection layer over a support base; mounting a plurality of semiconductor chips over the interconnection layer; molding the plurality of semiconductor chips with resin; forming an alignment mark in the resin; and obtaining a molded structure by removing the interconnection layer, the plurality of semiconductor chips and the resin from the support base after forming the alignment mark.

Abstract: Provided is a method for manufacturing a semiconductor device which includes: forming a removal layer over a base (support base); forming an interconnect layer over the removal layer; mounting semiconductor chip(s) over the interconnect layer; and separating the base from the interconnect layer while inducing the separation so as to originate from the removal layer, by irradiating a laser having a wavelength transparent with respect to the support base from the back side thereof, selectively to an unmounted region having no semiconductor chip(s) mounted thereon.

Abstract: In an electronic device having multilayer resin interconnection layers, it is desired to reduce the warp of its support substrate. It is manufactured by: forming a lower layer including a via and a first insulating part on the support substrate; and forming an intermediate layer including a first interconnection and a second insulating part covering the first interconnection on the lower layer. The lower layer is formed by: forming the first insulating part on a first circuit region and a first region surrounding it; and forming the via on the first circuit region. The intermediate layer is formed by: forming the first interconnection on the first circuit region; forming a film of the second insulation part to cover the lower layer; and removing the second insulating part on the first region such that an outer circumferential part of an upper surface of the lower layer part is exposed.

Abstract: A semiconductor DNA sensing device is provided herein, which includes a detection section with a field-effect transistor including a semiconductor substrate and a first insulator layer formed thereon as a reactive gate insulator, the first insulating layer including silicon oxide or an inorganic oxide, a first organic monolayer formed on the first insulator layer, the first organic monolayer comprising an organic molecule having a reactive functional group, and a probe DNA containing 3 to 35 nucleotides bonded to the first organic monolayer by the reactive functional group either directly or by an intervening crosslinker, the structure of the probe DNA/the first organic monolayer/the insulating layer/the semiconductor constituting the detection section.

Abstract: A semiconductor DNA sensing device having a detection section is provided. The detection section comprises a structure of a probe DNA/a first organic monolayer/an insulating layer/a semiconductor. The field-effect transistor (FET) comprises a semiconductor substrate and a first insulator layer formed thereon as a reactive gate insulator, and the first insulating layer comprises silicon oxide or an inorganic oxide. The first organic monolayer formed on the first insulator layer comprises an organic molecule having a reactive functional group. The probe DNA contains 3 to 35 nucleotides, and this probe DNA is bonded to the first organic monolayer by the reactive functional group either directly or by an intervening crosslinker.