Patents by Inventor Noriko Harima

Noriko Harima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Memory device in a programmed state having a memory layer comprising conductive nanoparticles coated with an organic film formed between two conductive layers
    Patent number: 9006741
    Abstract: A memory device is provided, which includes a first conductive layer, a second conductive layer, and a memory layer interposed between the first conductive layer and the second conductive layer. The memory layer includes a first portion and a second portion, each of which includes at least a nanoparticle. The nanoparticle includes a conductive material coated with an organic film. The first portion is in contact with the first conductive layer and the second conductive layer, and a side surface of the first portion is surrounded by the second portion.
    Type: Grant
    Filed: January 23, 2008
    Date of Patent: April 14, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kensuke Yoshizumi, Noriko Harima
  • Method for manufacturing semiconductor device including a photoelectric conversion element
    Patent number: 8426231
    Abstract: An object of an embodiment of the disclosed invention is to provide a semiconductor device including a photoelectric conversion element with excellent characteristics. An object of an embodiment of the disclosed invention is to provide a semiconductor device including a photoelectric conversion device with excellent characteristic through a simple process. A semiconductor device is provided, which includes a light-transmitting substrate; an insulating layer over the light-transmitting substrate; and a photoelectric conversion element over the insulating layer.
    Type: Grant
    Filed: August 17, 2010
    Date of Patent: April 23, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Atsuo Isobe, Noriko Harima, Noriko Matsumoto, Akihisa Shimomura, Kosei Noda, Kazuko Yamawaki, Yoshiyuki Kurokawa, Takayuki Ikeda, Takashi Hamada
  • Manufacturing method of wiring and storage element
    Patent number: 8075945
    Abstract: In a coating method, such as a droplet discharge method which requires baking, it is an object of the present invention to reduce the baking temperature at the time of forming a wiring and a conductive film. As a feature of the present invention, a composition, in which nanoparticles of a conductive material are dispersed in a solvent, is discharged using a droplet discharge method, and then dried to vaporize the solvent. Then, pretreatment using active oxygen is performed. After which, baking is then performed, whereby a wiring and a conductive film are formed. By performance of the pretreatment by active oxygen before the baking, a baking temperature at the time of forming the wiring and conductive film can be reduced.
    Type: Grant
    Filed: February 27, 2008
    Date of Patent: December 13, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kensuke Yoshizumi, Noriko Harima, Tomoko Yamada
  • Semiconductor Device and Manufacturing Method Thereof
    Publication number: 20110049588
    Abstract: An object of an embodiment of the disclosed invention is to provide a semiconductor device including a photoelectric conversion element with excellent characteristics. An object of an embodiment of the disclosed invention is to provide a semiconductor device including a photoelectric conversion device with excellent characteristic through a simple process. A semiconductor device is provided, which includes a light-transmitting substrate; an insulating layer over the light-transmitting substrate; and a photoelectric conversion element over the insulating layer.
    Type: Application
    Filed: August 17, 2010
    Publication date: March 3, 2011
    Inventors: Atsuo Isobe, Noriko Harima, Noriko Matsumoto, Akihisa Shimomura, Kosei Noda, Kazuko Yamawaki, Yoshiyuki Kurokawa, Takayuki Ikeda, Takashi Hamada
  • Manufacturing Method of Wiring and Storage Element
    Publication number: 20080220155
    Abstract: In a coating method, such as a droplet discharge method which requires baking, it is an object of the present invention to reduce the baking temperature at the time of forming a wiring and a conductive film. As a feature of the present invention, a composition, in which nanoparticles of a conductive material are dispersed in a solvent, is discharged using a droplet discharge method, and then dried to vaporize the solvent. Then, pretreatment using active oxygen is performed. After which, baking is then performed, whereby a wiring and a conductive film are formed. By performance of the pretreatment by active oxygen before the baking, a baking temperature at the time of forming the wiring and conductive film can be reduced.
    Type: Application
    Filed: February 27, 2008
    Publication date: September 11, 2008
    Inventors: Kensuke Yoshizumi, Noriko Harima, Tomoko Yamada
  • Memory Device
    Publication number: 20080185578
    Abstract: A memory device is provided, which includes a first conductive layer, a second conductive layer, and a memory layer interposed between the first conductive layer and the second conductive layer. The memory layer includes a first portion and a second portion, each of which includes at least a nanoparticle. The nanoparticle includes a conductive material coated with an organic film. The first portion is in contact with the first conductive layer and the second conductive layer, and a side surface of the first portion is surrounded by the second portion.
    Type: Application
    Filed: January 23, 2008
    Publication date: August 7, 2008
    Inventors: Kensuke Yoshizumi, Noriko Harima