Patents by Inventor Noriko Shimizu

Noriko Shimizu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160314890
    Abstract: An electronic component includes a body made of a material containing particles of a metallic magnetic material, and an outer electrode disposed on a surface of the body. The surface of the body has a contact portion with which the outer electrode is in contact, and the surface of the body includes particles of the metallic magnetic material which are exposed from the surface of the body.
    Type: Application
    Filed: July 7, 2016
    Publication date: October 27, 2016
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventors: Masaki KITAJIMA, Takashi TOMOHIRO, Gota SHINOHARA, Hironori SUZUKI, Noriko SHIMIZU
  • Patent number: 9478354
    Abstract: An inductor manufacturing method includes a first step of press bonding a Cu foil onto a non-magnetic resin sheet, a second step of forming a conductor pattern by performing etching on the Cu foil, a third step of press bonding another non-magnetic resin sheet onto the conductor pattern, and a via conductor formation step of forming a via conductor that penetrates through the other resin sheet and leads to the conductor pattern. The method further includes a step of forming a body in which resin having magnetism is provided outside of a coil, by press bonding magnetic-powder-containing resin sheets onto a multilayer body, obtained by a manufacturing method including the first to third steps and the via conductor formation step, and then thermally curing the magnetic-powder-containing resin sheets.
    Type: Grant
    Filed: February 4, 2015
    Date of Patent: October 25, 2016
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Hironori Suzuki, Yasushi Takeda, Noriko Shimizu, Yoichi Nakatsuji, Gota Shinohara, Junji Kurobe, Kuniaki Yosui
  • Publication number: 20150235765
    Abstract: An inductor manufacturing method includes a first step of press bonding a Cu foil onto a non-magnetic resin sheet, a second step of forming a conductor pattern by performing etching on the Cu foil, a third step of press bonding another non-magnetic resin sheet onto the conductor pattern, and a via conductor formation step of forming a via conductor that penetrates through the other resin sheet and leads to the conductor pattern. The method further includes a step of forming a body in which resin having magnetism is provided outside of a coil, by press bonding magnetic-powder-containing resin sheets onto a multilayer body, obtained by a manufacturing method including the first to third steps and the via conductor formation step, and then thermally curing the magnetic-powder-containing resin sheets.
    Type: Application
    Filed: February 4, 2015
    Publication date: August 20, 2015
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventors: Hironori SUZUKI, Yasushi TAKEDA, Noriko SHIMIZU, Yoichi NAKATSUJI, Gota SHINOHARA, Junji KUROBE, Kuniaki YOSUI
  • Publication number: 20150022195
    Abstract: A detector of a magnetic field probe includes a first wiring pattern formed on a first surface of a multilayer substrate and having a predetermined inclination with respect to an axial line direction of the magnetic field probe, a second wiring pattern formed on a second surface and having the predetermined inclination with respect to the axial line direction, and a first penetrating via penetrating through the multilayer substrate in the thickness direction and connecting a front end portion of the first wiring pattern and a front end portion of the second wiring pattern. A rear end portion of the first wiring pattern is connected to a conductor pattern configuring a strip line and a rear end portion of the second wiring pattern is connected to ground patterns configuring the strip line.
    Type: Application
    Filed: September 26, 2014
    Publication date: January 22, 2015
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventors: Noriko SHIMIZU, Takashi ICHIMURA, Takahiro AZUMA
  • Patent number: 8790995
    Abstract: According to one embodiment, a substrate processing method is disclosed. The above method includes: grinding an outer edge portion on a back surface of a semiconductor wafer with a semiconductor element formed on its front surface with a first grindstone or blade to thereby form an annular groove; grinding a projecting portion on an inner side of the groove with a second grindstone to thereby form a recessed portion integrally with the groove on the back surface of the semiconductor wafer; and grinding a bottom surface of the recessed portion including a ground surface made by the second grindstone with a third grindstone.
    Type: Grant
    Filed: March 16, 2012
    Date of Patent: July 29, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shinya Takyu, Noriko Shimizu, Tsutomu Fujita
  • Patent number: 8771456
    Abstract: According to one embodiment, there is disclosed a method of manufacturing a semiconductor device forming a release layer on a region excluding a peripheral edge portion of a surface of a first substrate, bonding a second substrate to at least a region including the release layer of the surface of the first substrate via an adhesive layer, removing physically a peripheral edge portion of the second substrate in a manner that at least a surface of the adhesive layer right under the peripheral edge portion of the second substrate is exposed, the adhesive layer is caused to remain between the peripheral edge portion of the first substrate and the second substrate, and adhesion between the first and second substrates is maintained, and then dissolving the adhesive layer.
    Type: Grant
    Filed: March 8, 2013
    Date of Patent: July 8, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Noriko Shimizu, Shinya Takyu
  • Publication number: 20130248099
    Abstract: According to one embodiment, there is disclosed a method of manufacturing a semiconductor device forming a release layer on a region excluding a peripheral edge portion of a surface of a first substrate, bonding a second substrate to at least a region including the release layer of the surface of the first substrate via an adhesive layer, removing physically a peripheral edge portion of the second substrate in a manner that at least a surface of the adhesive layer right under the peripheral edge portion of the second substrate is exposed, the adhesive layer is caused to remain between the peripheral edge portion of the first substrate and the second substrate, and adhesion between the first and second substrates is maintained, and then dissolving the adhesive layer.
    Type: Application
    Filed: March 8, 2013
    Publication date: September 26, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Noriko SHIMIZU, Shinya Takyu
  • Publication number: 20130001766
    Abstract: According to one embodiment, a substrate processing method is disclosed. The above method includes: grinding an outer edge portion on a back surface of a semiconductor wafer with a semiconductor element formed on its front surface with a first grindstone or blade to thereby form an annular groove; grinding a projecting portion on an inner side of the groove with a second grindstone to thereby form a recessed portion integrally with the groove on the back surface of the semiconductor wafer; and grinding a bottom surface of the recessed portion including a ground surface made by the second grindstone with a third grindstone.
    Type: Application
    Filed: March 16, 2012
    Publication date: January 3, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Shinya TAKYU, Noriko Shimizu, Tsutomu Fujita
  • Publication number: 20120329369
    Abstract: According to one embodiment, a substrate processing method will be disclosed. The method includes attaching a substrate to be processed onto a supporting substrate via an adhesive layer, removing an outer peripheral edge portion of the substrate to be processed together with the adhesive sticking to the outer peripheral edge portion, and grinding a surface of a side opposite to the supporting substrate of the substrate to be processed whose outer peripheral edge portion is removed.
    Type: Application
    Filed: March 15, 2012
    Publication date: December 27, 2012
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Noriko SHIMIZU, Shinya TAKYU
  • Publication number: 20080299686
    Abstract: A method for manufacturing a semiconductor device, includes; measuring a within-wafer distribution of a physical quantity; and etching the wafer so that the physical quantity get close to constant within the wafer. Alternatively, a method for manufacturing a semiconductor device, includes, measuring a within-wafer distribution of a physical quantity of at least one of a plurality of semiconductor layers provided in a wafer; determining a within-wafer distribution of etching amount for the at least one of the plurality of semiconductor layers based on the measured within-wafer distribution of the physical quantity; and etching the at least one of the plurality of semiconductor layers based on the determined within-wafer distribution of the etching amount so that the etching amount is locally varied within the wafer.
    Type: Application
    Filed: October 12, 2007
    Publication date: December 4, 2008
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Motoshige KOBAYASHI, Masanobu Echizenya, Shinya Takyu, Noriko Shimizu, Hideki Nozaki, Masanobu Tsuchitani
  • Patent number: 7294558
    Abstract: A starting point for cleavage made up of at least one of a groove and a through hole is formed on a chip dividing line or a dicing line along the cleaved surface of a wafer. Liquid matter is injected into the starting point. Then, the liquid matter is changed by applying an external factor that changes the liquid matter physically. Making use of the change, the wafer is cleaved so as to divide the wafer into semiconductor chips.
    Type: Grant
    Filed: March 7, 2005
    Date of Patent: November 13, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Noriko Shimizu, Shinya Takyu, Tetsuya Kurosawa
  • Publication number: 20050196899
    Abstract: A starting point for cleavage made up of at least one of a groove and a through hole is formed on a chip dividing line or a dicing line along the cleaved surface of a wafer. Liquid matter is injected into the starting point. Then, the liquid matter is changed by applying an external factor that changes the liquid matter physically. Making use of the change, the wafer is cleaved so as to divide the wafer into semiconductor chips.
    Type: Application
    Filed: March 7, 2005
    Publication date: September 8, 2005
    Inventors: Noriko Shimizu, Shinya Takyu, Tetsuya Kurosawa
  • Publication number: 20050020658
    Abstract: A pharmaceutical composition for application to an area of skin of a subject for local and/or systemic treatment of a COX-2 mediated disorder comprises a backing sheet that is flexibly conformable to the area of skin, the backing sheet having opposing surfaces that are respectively distal and proximal to the skin when applied; and a coating on the proximal surface of the backing sheet that comprises (a) an adhesive, (b) an active agent comprising a selective COX-2 inhibitory sulfonamide drug of low water solubility, and (c) a solvent system for the active agent, wherein the active agent is in a therapeutically effective total amount and the solvent system is selected with regard to composition and amount thereof to be effective to maintain the active agent substantially completely in solubilized form.
    Type: Application
    Filed: October 10, 2003
    Publication date: January 27, 2005
    Inventors: Katsuyuki Inoo, Ken-Ichi Hattori, Noriko Shimizu
  • Patent number: 5760273
    Abstract: A process for producing an unsymmetrical chain carbonic acid ester is described, which comprises reacting a first symmetrical chain carbonic acid ester with a second symmetrical chain carbonic acid ester or a monohydric alcohol in the presence of a catalyst comprising as an active catalyst component an oxide of at least one element selected from the Group IIIB elements of the periodic table.
    Type: Grant
    Filed: October 18, 1996
    Date of Patent: June 2, 1998
    Assignee: Mitsubishi Chemical Corporation
    Inventors: Masashi Inaba, Katsuaki Hasegawa, Noriko Shimizu, Yuji Ohgomori, Masayuki Honda, Takamichi Suzuki