Patents by Inventor Norio Fukasawa
Norio Fukasawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11050091Abstract: A solid battery including at least one first laminate body in which a first electrolyte layer, a first positive electrode layer, a first current collecting layer, and a second positive electrode layer are laminated in this order; at least one second laminate body in which a second electrolyte layer, a first negative electrode layer, a second current collecting layer, and a second negative electrode layer are laminated in this order; a first insulating layer connected to at least part of a side surface portion of the first laminate body; and a second insulating layer connected to at least part of a side surface portion of the second laminate body. Each of the first current collecting layer and the second current collecting layer has ionic conductivity of 10?7 S/cm or lower, and each of the first insulating layer and the second insulating layer has ionic conductivity of 10?7 S/cm or lower.Type: GrantFiled: April 25, 2019Date of Patent: June 29, 2021Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Keisuke Shimizu, Masamitsu Suzuki, Norio Fukasawa
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Publication number: 20190393505Abstract: An all-solid-state battery that includes a cathode layer, an anode layer, and a solid electrolyte layer between the cathode layer and the anode layer. The anode layer contains a carbon material, and a volume occupancy of the carbon material in the anode layer is 50 vol % to 95 vol %.Type: ApplicationFiled: August 27, 2019Publication date: December 26, 2019Inventors: Masamitsu Suzuki, Keisuke Shimizu, Tomohiro Kato, Norio Fukasawa, Motokazu Ishihara
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Publication number: 20190252728Abstract: A solid battery including at least one first laminate body in which a first electrolyte layer, a first positive electrode layer, a first current collecting layer, and a second positive electrode layer are laminated in this order; at least one second laminate body in which a second electrolyte layer, a first negative electrode layer, a second current collecting layer, and a second negative electrode layer are laminated in this order; a first insulating layer connected to at least part of a side surface portion of the first laminate body; and a second insulating layer connected to at least part of a side surface portion of the second laminate body. Each of the first current collecting layer and the second current collecting layer has ionic conductivity of 10?7 S/cm or lower, and each of the first insulating layer and the second insulating layer has ionic conductivity of 10?7 S/cm or lower.Type: ApplicationFiled: April 25, 2019Publication date: August 15, 2019Inventors: Keisuke Shimizu, Masamitsu Suzuki, Norio Fukasawa
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Publication number: 20150208560Abstract: Provided is a holding head, including: a holder unit including a plurality of holders, the plurality of holders extending in a first direction, the plurality of holders being arrayed in a second direction at a predetermined pitch, the first direction being different from the second direction, each of the plurality of holders being capable of holding an object group, the object group including a plurality of objects arrayed in series in the first direction out of a plurality of objects arranged two-dimensionally; and a support supporting the holder unit.Type: ApplicationFiled: January 5, 2015Publication date: July 23, 2015Applicant: Sony CorporationInventors: Shoichi Baba, Norio Fukasawa
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Patent number: 8980692Abstract: A semiconductor device includes a circuit substrate, a first semiconductor chip disposed on the circuit substrate, a plurality of first spacers disposed on the first semiconductor chip, a second semiconductor chip which includes a first adhesive agent layer on a lower face thereof and is disposed on upper portions of the plurality of spacers, a wire which connects the circuit substrate to the first semiconductor chip, and a first sealing material which seals a gap between the first semiconductor chip and the first adhesive agent layer, wherein each height of the plurality of the first spacers is greater than height of the wire relative to an upper face of the first semiconductor chip.Type: GrantFiled: January 16, 2014Date of Patent: March 17, 2015Assignee: Fujitsu Semiconductor LimitedInventors: Kenichi Sasaki, Norio Fukasawa
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Publication number: 20140187000Abstract: A semiconductor device includes a circuit substrate, a first semiconductor chip disposed on the circuit substrate, a plurality of first spacers disposed on the first semiconductor chip, a second semiconductor chip which includes a first adhesive agent layer on a lower face thereof and is disposed on upper portions of the plurality of spacers, a wire which connects the circuit substrate to the first semiconductor chip, and a first sealing material which seals a gap between the first semiconductor chip and the first adhesive agent layer, wherein each height of the plurality of the first spacers is greater than height of the wire relative to an upper face of the first semiconductor chip.Type: ApplicationFiled: January 16, 2014Publication date: July 3, 2014Applicant: FUJITSU SEMICONDUCTOR LIMITEDInventors: Kenichi Sasaki, Norio Fukasawa
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Patent number: 8664775Abstract: A semiconductor device includes a circuit substrate, a first semiconductor chip disposed on the circuit substrate, a plurality of first spacers disposed on the first semiconductor chip, a second semiconductor chip which includes a first adhesive agent layer on a lower face thereof and is disposed on upper portions of the plurality of spacers, a wire which connects the circuit substrate to the first semiconductor chip, and a first sealing material which seals a gap between the first semiconductor chip and the first adhesive agent layer, wherein each height of the plurality of the first spacers is greater than height of the wire relative to an upper face of the first semiconductor chip.Type: GrantFiled: July 19, 2012Date of Patent: March 4, 2014Assignee: Fujitsu Semiconductor LimitedInventors: Kenichi Sasaki, Norio Fukasawa
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Publication number: 20130032942Abstract: A semiconductor device includes a circuit substrate, a first semiconductor chip disposed on the circuit substrate, a plurality of first spacers disposed on the first semiconductor chip, a second semiconductor chip which includes a first adhesive agent layer on a lower face thereof and is disposed on upper portions of the plurality of spacers, a wire which connects the circuit substrate to the first semiconductor chip, and a first sealing material which seals a gap between the first semiconductor chip and the first adhesive agent layer, wherein each height of the plurality of the first spacers is greater than height of the wire relative to an upper face of the first semiconductor chip.Type: ApplicationFiled: July 19, 2012Publication date: February 7, 2013Applicant: FUJITSU SEMICONDUCTOR LIMITEDInventors: Kenichi Sasaki, Norio Fukasawa
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Patent number: 8357620Abstract: An embodiment of the invention provides a laser annealing method, including the steps of radiating a laser beam to an amorphous film on a substrate while scanning the laser beam for the amorphous film, crystallizing the amorphous film, detecting a light quantity of laser beam reflected from the substrate and a scanning speed of the laser beam while the radiation and the scanning of the laser beam are carried out for the amorphous film, and controlling a radiation level and the scanning speed of the laser beam based on results of comparison of the light quantity of laser beam reflected from the substrate, and the scanning speed of the laser beam with respective preset references.Type: GrantFiled: October 6, 2009Date of Patent: January 22, 2013Assignee: Sony CorporationInventors: Katsuji Takagi, Akio Machida, Toshio Fujino, Tadahiro Kono, Norio Fukasawa, Shinsuke Haga
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Patent number: 7872360Abstract: A semiconductor device is disclosed that includes a wiring board having a via formed therein; a semiconductor element provided on the wiring board; a resist layer covering a surface of the wiring board, the resist layer having an opening in a part thereof positioned on the via; and a sealing resin covering the surface of the via in the opening and the resist layer, and sealing the semiconductor device.Type: GrantFiled: March 4, 2008Date of Patent: January 18, 2011Assignee: Fujitsu Semiconductor LimitedInventor: Norio Fukasawa
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Publication number: 20100093112Abstract: An embodiment of the invention provides a laser annealing method, including the steps of radiating a laser beam to an amorphous film on a substrate while scanning the laser beam for the amorphous film, crystallizing the amorphous film, detecting a light quantity of laser beam reflected from the substrate and a scanning speed of the laser beam while the radiation and the scanning of the laser beam are carried out for the amorphous film, and controlling a radiation level and the scanning speed of the laser beam based on results of comparison of the light quantity of laser beam reflected from the substrate, and the scanning speed of the laser beam with respective preset references.Type: ApplicationFiled: October 6, 2009Publication date: April 15, 2010Applicant: SONY CORPORATIONInventors: Katsuji Takagi, Akio Machida, Toshio Fujino, Tadahiro Kono, Norio Fukasawa, Shinsuke Haga
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Publication number: 20090291515Abstract: A semiconductor device for fingerprint sensors reduces a mounting area of the semiconductor device and improves a processing capacity of assembling and testing process. The semiconductor device has a functional surface that provides a predetermined function. A semiconductor element has a circuit formation surface on which a plurality of electrodes are formed and a back surface opposite to the circuit formation surface. A part of the circuit formation surface functions as the functional surface. Wiring is formed on the back surface of the semiconductor element. A plurality of connection parts extends between the circuit formation surface and the back surface of the semiconductor element so as to electrically connect the electrodes to the wiring. A plurality of external connection terminals are exposed outside the semiconductor device on a side of the back surface of the semiconductor element.Type: ApplicationFiled: July 29, 2009Publication date: November 26, 2009Applicant: FUJITSU MICROELECTRONICS LIMITEDInventor: Norio Fukasawa
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Patent number: 7616548Abstract: An optical pickup apparatus and an optical disc apparatus are adapted to raise the efficiency of utilization of the lasers of the apparatus for accurately detecting tracking errors by raising the intensity ratio of the beam of the 0-th order to the beams of the ±1st orders produced by splitting of the laser beam of the wavelength to be subjected to division by three. The optical pickup apparatus includes a light emitting section for emitting a first laser beam having wavelength ?1 and a second laser beam having wavelength ?2 different from the wavelength ?1.Type: GrantFiled: June 17, 2005Date of Patent: November 10, 2009Assignee: Sony CorporationInventors: Masahiro Saito, Norio Fukasawa, Kiyoshi Toyota, Junichi Suzuki
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Patent number: 7586185Abstract: A semiconductor device for fingerprint sensors reduces a mounting area of the semiconductor device and improves a processing capacity of assembling and testing process. The semiconductor device has a functional surface that provides a predetermined function. A semiconductor element has a circuit formation surface on which a plurality of electrodes are formed and a back surface opposite to the circuit formation surface. A part of the circuit formation surface functions as the functional surface. Wiring is formed on the back surface of the semiconductor element. A plurality of connection parts extends between the circuit formation surface and the back surface of the semiconductor element so as to electrically connect the electrodes to the wiring. A plurality of external connection terminals are exposed outside the semiconductor device on a side of the back surface of the semiconductor element.Type: GrantFiled: August 24, 2005Date of Patent: September 8, 2009Assignee: Fujitsu Microelectronics LimitedInventor: Norio Fukasawa
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Patent number: 7556985Abstract: A semiconductor device has a resin package layer on a principal surface of a semiconductor chip, on which a number of bump electrodes are formed, wherein the semiconductor device has a chamfer surface or a stepped surface on a top edge part such that the external shock or stress applied to such an edge part is dissipated by the chamfer surface of the stepped surface.Type: GrantFiled: October 14, 2005Date of Patent: July 7, 2009Assignee: Fujitsu Microelectronics LimitedInventors: Norio Fukasawa, Hirohisa Matsuki, Kenichi Nagashige, Yuzo Hamanaka, Muneharu Morioka
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Publication number: 20080224333Abstract: A semiconductor device is disclosed that includes a wiring board having a via formed therein; a semiconductor element provided on the wiring board; a resist layer covering a surface of the wiring board, the resist layer having an opening in a part thereof positioned on the via; and a sealing resin covering the surface of the via in the opening and the resist layer, and sealing the semiconductor device.Type: ApplicationFiled: March 4, 2008Publication date: September 18, 2008Applicant: FUJITSU LIMITEDInventor: Norio Fukasawa
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Patent number: 7345982Abstract: An optical pickup device is provided which includes a double-wavelength objective lens (34) that collects a light beam selectively emitted from a light-emitting/-detecting element (31) that selectively emits a plurality of light beams different in wavelength from each other, and also return light from an optical disk (2), a first diffraction grating (45) that splits the light beam emitted from a light-emitting/-detecting element (31) into three beams including a zero-order light beam and positive and negative first-order light beams, a second diffraction grating (46) that diffracts the return light for traveling along a light path separate from that of the outgoing light, and a third diffraction grating (47) that corrects a light-path deviation by diffracting the positive first-order light beam diffracted by the second diffraction grating (46).Type: GrantFiled: November 19, 2002Date of Patent: March 18, 2008Assignee: Sony CorporationInventors: Norio Fukasawa, Junichi Suzuki, Kiyoshi Toyota, Tetsu Tanaka, Satoru Ishii, Takeshi Kubo, Masahiro Saito
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Patent number: 7248544Abstract: Disclosed is an optical head in which position adjustment of a photodetector light receiving surface or component parts may be simplified, production costs may be reduced and operational reliability may be improved. The optical head includes a light source 22, radiating light of a preset wavelength, an objective lens 27 for condensing the outgoing light from the light source 22 on an optical disc 2 and for condensing the return light from the optical disc 2, a beam splitter 25 for branching the optical path of the return light reflected by the optical disc 2, and for collimating the branched return light so as to be parallel to the outgoing light from the light source 22, a composite optical component including a splitting prism 30 arranged on a site of incidence of the branched return light for spatially splitting the return light, and a light receiving unit for receiving plural return light beams spatially split by the splitting prism 30 for producing focusing error signals.Type: GrantFiled: May 20, 2004Date of Patent: July 24, 2007Assignee: Sony CorporationInventors: Masahiro Saito, Norio Fukasawa, Kiyoshi Toyota, Junichi Suzuki, Minoru Kubo, Souichi Murakami
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Patent number: 7180668Abstract: This invention is an optical pickup device having a composite optical element (32) which has a first diffraction grating (45) for splitting a light beam emitted from a light source (31) into zeroth-order light, plus-first-order light and minus-first-order light, a second diffraction grating (46) for diffracting the optical path of a return light beam from an optical disc (2), and a split prism (47) arranged at a position where the minus-first-order light diffracted by the second diffraction grating (46) is incident and adapted for splitting the minus-first-order light into a plurality of light beams. It also has a light receiving unit (35) for acquiring a focusing error signal FE by receiving each return light beam split by the split prism (47) and for acquiring a tracking error signal by receiving return light beams from the optical disc (2) of the plus-first-order light and the minus-first-order light split by the first diffraction grating (45).Type: GrantFiled: March 21, 2005Date of Patent: February 20, 2007Assignee: Sony CorporationInventors: Norio Fukasawa, Junichi Suzuki, Tetsu Tanaka, Takeshi Kubo
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Publication number: 20060214294Abstract: A semiconductor device for fingerprint sensors reduces a mounting area of the semiconductor device and improves a processing capacity of assembling and testing process. The semiconductor device has a functional surface that provides a predetermined function. A semiconductor element has a circuit formation surface on which a plurality of electrodes are formed and a back surface opposite to the circuit formation surface. A part of the circuit formation surface functions as the functional surface. Wiring is formed on the back surface of the semiconductor element. A plurality of connection parts extends between the circuit formation surface and the back surface of the semiconductor element so as to electrically connect the electrodes to the wiring. A plurality of external connection terminals are exposed outside the semiconductor device on a side of the back surface of the semiconductor element.Type: ApplicationFiled: August 24, 2005Publication date: September 28, 2006Applicant: FUJITSU LIMITEDInventor: Norio Fukasawa