Patents by Inventor Norio Ueno

Norio Ueno has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7943596
    Abstract: The present invention provides an ophthalmic pharmaceutical composition containing acetylated hyaluronic acid and a pharmacologically acceptable carrier. Preferably, the average molecular weight of the acetylated hyaluronic acid is 10,000 to 1,000,000, and the acetyl group substitution number is from 2.0 to 4.0. In a preferred embodiment, this ophthalmic pharmaceutical composition is used in the treatment or prevention of dry eye, and in an even more preferred embodiment it is a dry-eye instillation.
    Type: Grant
    Filed: May 8, 2008
    Date of Patent: May 17, 2011
    Assignee: Shiseido Company, Ltd.
    Inventors: Norio Ueno, Takashi Oka
  • Publication number: 20110034684
    Abstract: A novel process which can simply prepare a crosslinked hyaluronic acid gel having a small crosslinking agent content and exhibiting excellent viscoelasticity is provided. A process for preparing a crosslinked hyaluronic acid gel, comprising stirring and mixing a mixture containing 10 W/V % or more of hyaluronic acid, a crosslinking agent and water under acidic or alkaline condition.
    Type: Application
    Filed: September 27, 2010
    Publication date: February 10, 2011
    Applicant: SHISEIDO CO., LTD.
    Inventors: Yoshihiro Yokokawa, Takashi Oka, Yuichiro Mori, Norio Ueno
  • Publication number: 20110021347
    Abstract: The present invention provides a new molecular recognition material, wherein the control of morphology is possible and the selectivity and capture efficiency of the template molecule are excellent, and to provide a simple production method thereof. The molecular recognition material of the present invention is a core-shell particle, which has a shell layer on the core particle surface, and the material is characterized in that template molecules are imprinted on the above-described shell layer. And a production method of the molecular recognition material of the present invention comprising: (a) introducing an iniferter group on the core particle surface, (b) adsorbing the template molecule, after process (a), onto the core particle surface, and (c) forming the shell layer, after process (b), on the core particle surface.
    Type: Application
    Filed: August 29, 2008
    Publication date: January 27, 2011
    Applicants: KEIO UNIVERSITY, SHISEIDO COMPANY LTD.
    Inventors: Hiroshi Ugajin, Haruma Kawaguchi, Norio Ueno
  • Publication number: 20080221064
    Abstract: The present invention provides an ophthalmic pharmaceutical composition containing acetylated hyaluronic acid and a pharmacologically acceptable carrier. Preferably, the average molecular weight of the acetylated hyaluronic acid is 10,000 to 1,000,000, and the acetyl group substitution number is from 2.0 to 4.0. In a preferred embodiment, this ophthalmic pharmaceutical composition is used in the treatment or prevention of dry eye, and in an even more preferred embodiment it is a dry-eye instillation.
    Type: Application
    Filed: May 8, 2008
    Publication date: September 11, 2008
    Applicant: Shiseido Company, Ltd.
    Inventors: Norio Ueno, Takashi Oka
  • Patent number: 7266308
    Abstract: Using a switching signal from a coarse/fine switching and operation mode switching circuit, the width of change of a counter control value during power up is increased, and the width of change is reduced once a steady state is reached. In the steady state, the frequency of updating is limited by a control signal from an update permit control circuit. In the steady state, the frequency band of a current source in an LD driving circuit is reduced in width.
    Type: Grant
    Filed: August 15, 2005
    Date of Patent: September 4, 2007
    Assignee: Fujitsu Limited
    Inventors: Tadao Inoue, Tadashi Ikeuchi, Hiroyuki Rokugawa, Masaaki Kawai, Norio Ueno, Norio Murakami, Toru Matsuyama, Makoto Miki, Toshiyuki Takauji
  • Publication number: 20060166930
    Abstract: The present invention provides an ophthalmic pharmaceutical composition containing acetylated hyaluronic acid and a pharmacologically acceptable carrier. Preferably, the average molecular weight of the acetylated hyaluronic acid is 10,000 to 1,000,000, and the acetyl group substitution number is from 2.0 to 4.0. In a preferred embodiment, this ophthalmic pharmaceutical composition is used in the treatment or prevention of dry eye, and in an even more preferred embodiment it is a dry-eye instillation.
    Type: Application
    Filed: February 27, 2004
    Publication date: July 27, 2006
    Inventors: Norio Ueno, Takashi Oka
  • Publication number: 20060105022
    Abstract: [PROBLEMS] A novel process which can simply prepare a crosslinked hyaluronic acid gel having a small crosslinking agent content and exhibiting excellent viscoelasticity is provided. [MEANS TO SOLVE] A method of producing cross-linking hyaluronic acid gel, comprising stirring and mixing a mixture containing 20 W/V % or more of hyaluronic acid, a crosslinking agent and water under acidic or alkaline condition.
    Type: Application
    Filed: November 14, 2005
    Publication date: May 18, 2006
    Applicant: Shiseido Co., Ltd.
    Inventors: Yoshihiro Yokokawa, Takashi Oka, Yuichiro Mori, Norio Ueno
  • Publication number: 20060024068
    Abstract: Using a switching signal from a coarse/fine switching and operation mode switching circuit, the width of change of a counter control value during power up is increased, and the width of change is reduced once a steady state is reached. In the steady state, the frequency of updating is limited by a control signal from an update permit control circuit. In the steady state, the frequency band of a current source in an LD driving circuit is reduced in width.
    Type: Application
    Filed: August 15, 2005
    Publication date: February 2, 2006
    Applicant: Fujitsu Limited
    Inventors: Tadao Inoue, Tadashi Ikeuchi, Hiroyuki Rokugawa, Masaaki Kawai, Norio Ueno, Norio Murakami, Toru Matsuyama, Makoto Miki, Toshiyuki Takauji
  • Patent number: 6975813
    Abstract: Using a switching signal from a coarse/fine switching and operation mode switching circuit, the width of change of a counter control value during power up is increased, and the width of change is reduced once a steady state is reached. In the steady state, the frequency of updating is limited by a control signal from an update permit control circuit. In the steady state, the frequency band of a current source in an LD driving circuit is reduced in width.
    Type: Grant
    Filed: February 17, 2000
    Date of Patent: December 13, 2005
    Assignee: Fujitsu Limited
    Inventors: Tadao Inoue, Tadashi Ikeuchi, Hiroyuki Rokugawa, Masaaki Kawai, Norio Ueno, Norio Murakami, Toru Matsuyama, Makoto Miki, Toshiyuki Takauji
  • Patent number: 6728495
    Abstract: A light output control circuit to update light output synchronously with input data in burst signal transmission system is disclosed. The circuit has a function of issuing light deterioration warning unerringly, which includes: a monitoring portion to detect light output emitted from a light emission element driven in accordance with transmission data; a level comparator to compare a monitoring signal outputted from the monitoring portion with a reference signal; a data detection portion to detect the existence of the transmission data; and an output controller to determine whether a light output deterioration warning is to be issued using an output signal of the data detection portion and an output signal of the level comparator.
    Type: Grant
    Filed: March 7, 2000
    Date of Patent: April 27, 2004
    Assignee: Fujitsu Limited
    Inventors: Makoto Miki, Norio Murakami, Toshiyuki Takauji, Toru Matsuyama, Tadashi Ikeuchi, Tadao Inoue, Norio Ueno
  • Patent number: 6597485
    Abstract: An optical transmitter circuit including a light receiving element, such as a photodiode, which monitors the optical output of a light emitting element such as a semiconductor laser. A current-voltage converting circuit supplies a drive current from a drive circuit to the light emitting element and converts the output voltage of the light receiving element into voltage. An APC amplifier compares the converted output signals and a reference signal, and a hold circuit holds the output signal of the APC amplifier and uses the output signal as a current control signal of the drive circuit. A “1” continuous signal detecting circuit detects the continuation of “1” in a specified number of bits in the input data (DATA) and updates the hold value in the hold circuit.
    Type: Grant
    Filed: March 3, 2000
    Date of Patent: July 22, 2003
    Assignee: Fujitsu Limited
    Inventors: Tadashi Ikeuchi, Tadao Inoue, Toru Matsuyama, Makoto Miki, Norio Ueno
  • Patent number: 6566959
    Abstract: In an amplifying circuit composed of a basic amplifier and a bias circuit thereof, a drive transistor drives a load transistor, and a reference current source biases a drive-side and a load-side supporting bias transistors with a constant current for generating a bias voltage of the load transistor. Also, a load resistor or a drive-side common-gate transistor is inserted between the drive transistor and the load transistor. Also, a load-side common-gate transistor is inserted between the load transistor and a power supply. In addition, the bulks and sources of the load transistor and the load-side supporting bias transistor are short-circuited.
    Type: Grant
    Filed: November 8, 2001
    Date of Patent: May 20, 2003
    Assignee: Fujitsu Limited
    Inventors: Satoshi Ide, Norio Ueno
  • Publication number: 20020163386
    Abstract: In an amplifying circuit composed of a basic amplifier and a bias circuit thereof, a drive transistor drives a load transistor, and a reference current source biases a drive-side and a load-side supporting bias transistors with a constant current for generating a bias voltage of the load transistor. Also, a load resistor or a drive-side common-gate transistor is inserted between the drive transistor and the load transistor. Also, a load-side common-gate transistor is inserted between the load transistor and a power supply. In addition, the bulks and sources of the load transistor and the load-side supporting bias transistor are short-circuited.
    Type: Application
    Filed: November 8, 2001
    Publication date: November 7, 2002
    Inventors: Satoshi Ide, Norio Ueno
  • Patent number: 6282216
    Abstract: A burst mode optical transmitter circuit comprises a semiconductor laser, a photodiode for monitoring the light output from the semiconductor laser, a current-voltage converting circuit for converting the current detected by the photodiode into a voltage, an APC amplifier, a holding circuit for holding, as a current control signal, the output signal from the APC amplifier, a driving circuit for supplying a driving current to the semiconductor laser according the current control signal from the holding circuit and the the data input in the burst mode, and a data interruption detecting circuit for detecting an interrupt period of the data input to the driving circuit to reset the holding circuit, in which the current control signal held in the hold circuit is reset by the reset signal, whereby a stable burst optical transmission can be performed stably with a simple construction.
    Type: Grant
    Filed: December 23, 1999
    Date of Patent: August 28, 2001
    Assignee: Fujitsu Limited
    Inventors: Tadashi Ikeuchi, Tadao Inoue, Toru Matsuyama, Toshiyuki Takauji, Norio Ueno
  • Patent number: 5892402
    Abstract: A drain terminal of a first N-channel MOS transistor is connected to an output side of a first current mirror input current via a voltage drop device, a first current mirror input current is supplied to the gate terminals of first, third, and fifth N-channel MOS transistors, and a second current mirror input current is supplied to the gate terminals of second and fourth N-channel MOS transistors.
    Type: Grant
    Filed: November 5, 1996
    Date of Patent: April 6, 1999
    Assignee: Fujitsu Limited
    Inventors: Kazunari Tsubaki, Norio Ueno
  • Patent number: 5512853
    Abstract: An interface circuit for interfacing between an integrated circuit (IC) on a transmitting side and an IC on a receiving side over a line on a printed circuit board comprises an output circuit implemented in the IC on the transmitting side and composed of a current source for supplying a given current and a switching circuit for cutting off the given current according to a binary signal and delivering the given current as a current signal to the line, and an input circuit implemented in the IC on the receiving side and composed of a transimpedance circuit whose input impedance is equal to the one of the line and which converts the current signal into a voltage signal, and a comparator for identifying the voltage signal relative to a given threshold voltage and reproducing the binary signal. This circuitry makes it possible to provide an interface circuit that can be implemented in a CMOS IC during CMOS processing and operated at a low voltage.
    Type: Grant
    Filed: October 7, 1994
    Date of Patent: April 30, 1996
    Assignee: Fujitsu Limited
    Inventors: Norio Ueno, Toru Matsuyama
  • Patent number: 5481564
    Abstract: A digital adaptive equalizer equalizes received signals through digital filtering operations by changing filtering coefficients. It comprises a coefficient calculating unit for calculating the filtering coefficients by using one kind of parameters, such as distance, as an input to a function corresponding to the filtering coefficients and a filtering operation executing unit for executing digital filtering operations based on the filtering coefficients. A variable lag filter for adjusting the phase delay of received received signals is provided. A coefficient converting unit calculates a part or all of tap coefficients of the filter using at least one piece of timing control information.
    Type: Grant
    Filed: July 22, 1991
    Date of Patent: January 2, 1996
    Assignee: Fujitsu Limited
    Inventors: Mitsuo Kakuishi, Yutaka Awata, Norio Ueno, Seiji Miyoshi, Norio Murakami, Atsushi Manabe
  • Patent number: 5291522
    Abstract: In a device for estimating a sampled value of an impulse response from input and output signals of a decision circuit which performs a signal decision procedure for reproducing a digital signal, there are provided a first part, operatively coupled to the decision circuit, for generating a first average of absolute values of samples of decided values obtained from the output signal of the decision circuit. A second part is also provided, operatively coupled to the decision circuit, for generating a second average of absolute values of samples of equalized outputs obtained from the input signal of the decision circuit. Also provided is a third part, operatively coupled to the first and second parts for generating a ratio of the first average and the second average, with the ratio being an estimate of the sampled value of the impulse response at a sampling point.
    Type: Grant
    Filed: July 3, 1991
    Date of Patent: March 1, 1994
    Assignee: Fujitsu Limited
    Inventors: Norio Ueno, Yutaka Awata
  • Patent number: 4468749
    Abstract: An adjustable attenuator circuit in which sampled electric charges are partially transferred from a sampling capacitor to a charge dividing capacitor during a short time within each sampling period, and electric charges stored in the charge dividing capacitor are additively transferred to an integrating capacitor or are discharged to ground according to the content of a weighting coefficient which determines the attenuation factor of the adjustable attenuator circuit.
    Type: Grant
    Filed: August 12, 1981
    Date of Patent: August 28, 1984
    Assignee: Fujitsu Limited
    Inventors: Seiji Kato, Norio Ueno, Mitsuo Kakuishi
  • Patent number: 4429281
    Abstract: An integrator for use in a switched capacitor-filter, in which switching elements are connected to an input and to an output of an operational amplifier included in the integrator for clamping the input and output to a ground potential during suspension of the integral operation, in order to prevent potentials at the input and output of the operational amplifier from varying and hence ensure rapid stabilization of the integral operation of the integrator.
    Type: Grant
    Filed: December 5, 1980
    Date of Patent: January 31, 1984
    Assignee: Fujitsu Limited
    Inventors: Akihiko Ito, Kazuhiro Kobayashi, Hisami Tanaka, Norio Ueno