Abstract: A method for producing a semiconductor device comprising a process step of forming a device configuration pattern in a device formation region in a chip formation region on a film side of a semiconductor wafer having the film for forming a pattern, and forming inspection patterns in a plurality of inspection regions in the chip formation region, and an inspection step, wherein the inspection patterns have a repeat pattern and a uniform pattern formed in a first inspection region in the plurality of inspection regions, the inspection step has at least a pattern inspection step including a first inspection to measure a parameter of the repeat pattern, by using an optical measurement method capable of measuring a three-dimensional pattern shape, and a second inspection to measure a film thickness of the uniform pattern by using an optical measurement method capable of measuring the film thickness.

Abstract: An interlayer insulating film is formed on a semiconductor substrate having a semiconductor element formed thereon. At this time, there are protrusions higher than surroundings thereof and non-protruding portions lower than the protrusions on the surface of the interlayer insulating film. First, a first polishing process is carried out on the surface of the interlayer insulating film with use of a first abrasive having non-Prestonian properties produced by mixing abrasive materials including abrasive grains, a polymer additive and water at a predetermined first mixture ratio. Then, after the first abrasive process shifts to an automatically stopping state, a second polishing process is carried out on the surface of the interlayer insulating film with use of a second abrasive having the concentration of polymer additive lower than that of the first abrasive and produced by mixing the abrasive materials at a second mixture ratio different from the first mixture ratio.

Abstract: Disclosed is a semiconductor device fabrication method that comprises a fabrication process, wherein device structural patients are formed in a device formation area inside a chip formation area and wherein inspection patterns are formed in multiple inspection areas inside the aforementioned chip formation area, on the film-side of a semiconductor wafer that has a film for pattern formation, and an inspection process. The aforementioned inspection patterns have a repeating pattern with identical lines and identical spaces formed in a first inspection area among the aforementioned multiple inspection areas, and a uniform pattern without spaces formed in a second inspection area among the multiple inspection areas.

Abstract: An interlayer insulating film is formed on a semiconductor substrate having a semiconductor element formed thereon. At this time, there are protrusions higher than surroundings thereof and non-protruding portions lower than the protrusions on the surface of the interlayer insulating film. First, a first polishing process is carried out on the surface of the interlayer insulating film with use of a first abrasive having non-Prestonian properties produced by mixing abrasive materials including abrasive grains, a polymer additive and water at a predetermined first mixture ratio. Then, after the first abrasive process shifts to an automatically stopping state, a second polishing process is carried out on the surface of the interlayer insulating film with use of a second abrasive having the concentration of polymer additive lower than that of the first abrasive and produced by mixing the abrasive materials at a second mixture ratio different from the first mixture ratio.

Abstract: In one embodiment of the present invention, a process is disclosed for producing a semiconductor device that can suppress the diffusion of an electrically conductive metal into an insulating film.

Abstract: A process of manufacturing a semiconductor device comprising the step of chemical mechanical polishing for flattening an interlayer insulating film deposited on a wafer on which desired elements are in advance formed, wherein a stopper layer is formed on a region which will be excessively polished through the chemical mechanical polishing before or after forming the interlayer insulating film.

Abstract: A process of manufacturing a semiconductor device comprising the step of chemical mechanical polishing for flattening an interlayer insulating film deposited on a wafer on which desired elements are in advance formed, wherein a stopper layer is formed on a region which will be excessively polished through the chemical mechanical polishing before or after forming the interlayer insulating film.

Abstract: A polishing liquid supply apparatus for supplying a polishing liquid to a chemical mechanical polishing apparatus includes a polishing liquid supply system including a polishing liquid tank for storing the polishing liquid; and a polishing liquid supply path for supplying the polishing liquid from the polishing liquid tank to the chemical mechanical polishing apparatus. The polishing liquid supply system is structured so as to shield the polishing liquid therein from external air.