Abstract: An interconnect substrate includes a core layer including a resin layer mainly composed of a non-photosensitive thermosetting resin and a through interconnect extending through the resin layer, the core layer having no reinforcement member contained therein, a first interconnect structure laminated on a first side of the core layer and including first interconnect layers and first insulating layers mainly composed of a photosensitive resin, and a second interconnect structure laminated on a second side of the core layer and including second interconnect layers and a single second insulating layer mainly composed of a photosensitive resin, wherein the first interconnect layers are electrically connected to the second interconnect layers via the through interconnect, wherein the core layer has greater rigidity than the first interconnect structure and the second interconnect structure, and wherein a thickness of the second interconnect structure is greater than a thickness of each of the first insulating layer.

Abstract: A wiring board includes an insulating layer, a thin film capacitor laminated on the insulating layer, an interconnect layer electrically connected to the thin film capacitor, and an encapsulating resin layer laminated on the thin film capacitor. The interconnect layer includes a pad protruding from the thin film capacitor. The encapsulating resin layer is a mold resin having a non-photosensitive thermosetting resin as a main component thereof. The encapsulating resin layer exposes a top surface of the pad, and covers at least a portion of a side surface of the pad.

Abstract: A wiring board includes a first interconnect structure including a first interconnect layer, and a first insulating layer including a non-photosensitive thermosetting resin as a main component thereof, a second interconnect structure including second interconnect layers, and second insulating layers including a photosensitive resin as a main component thereof, and laminated on the first interconnect structure, and an encapsulating resin layer including a non-photosensitive thermosetting resin as a main component thereof, and laminated on an uppermost second insulating layer. An uppermost second interconnect layer includes a pad protruding from the uppermost second insulating layer. The encapsulating resin layer exposes a top surface of the pad, and covers at least a portion of a side surface of the pad. Thermal expansion coefficients of the first insulating layer and the encapsulating resin layer are lower than that of the second insulating layers.

Abstract: A wiring board includes an interconnect structure including a plurality of interconnect layers, and a plurality of insulating layers having a photosensitive resin as a main component thereof, and an encapsulating resin layer having a non-photosensitive thermosetting resin as a main component thereof, laminated on an uppermost insulating layer of the plurality of insulating layers. An uppermost interconnect layer of the plurality of interconnect layers includes a pad protruding from the uppermost insulating layer. The encapsulating resin layer exposes an upper surface of the pad, and covers at least a portion of a side surface of the pad, and at least a portion of side surfaces of the plurality of insulating layers. The pad is configured to receive a semiconductor chip to be mounted thereon.

Abstract: An interconnect substrate includes a core layer including a resin layer mainly composed of a non-photosensitive thermosetting resin and a through interconnect extending through the resin layer, the core layer having no reinforcement member contained therein, a first interconnect structure laminated on a first side of the core layer and including first interconnect layers and first insulating layers mainly composed of a photosensitive resin, and a second interconnect structure laminated on a second side of the core layer and including second interconnect layers and a single second insulating layer mainly composed of a photosensitive resin, wherein the first interconnect layers are electrically connected to the second interconnect layers via the through interconnect, wherein the core layer has greater rigidity than the first interconnect structure and the second interconnect structure, and wherein a thickness of the second interconnect structure is greater than a thickness of each of the first insulating layer.

Abstract: A wiring board includes an insulating layer, a thin film capacitor laminated on the insulating layer, an interconnect layer electrically connected to the thin film capacitor, and an encapsulating resin layer laminated on the thin film capacitor. The interconnect layer includes a pad protruding from the thin film capacitor. The encapsulating resin layer is a mold resin having a non-photosensitive thermosetting resin as a main component thereof. The encapsulating resin layer exposes a top surface of the pad, and covers at least a portion of a side surface of the pad.

Abstract: A wiring board includes a first interconnect structure including a first interconnect layer, and a first insulating layer including a non-photosensitive thermosetting resin as a main component thereof, a second interconnect structure including second interconnect layers, and second insulating layers including a photosensitive resin as a main component thereof, and laminated on the first interconnect structure, and an encapsulating resin layer including a non-photosensitive thermosetting resin as a main component thereof, and laminated on an uppermost second insulating layer. An uppermost second interconnect layer includes a pad protruding from the uppermost second insulating layer. The encapsulating resin layer exposes a top surface of the pad, and covers at least a portion of a side surface of the pad. Thermal expansion coefficients of the first insulating layer and the encapsulating resin layer are lower than that of the second insulating layers.

Abstract: A wiring board includes a first wiring layer formed on one surface of a core layer, a first insulating layer formed on the one surface of the core layer so as to cover the first wiring layer, a via wiring embedded in the first insulating layer, a second wiring layer formed on a first surface of the first insulating layer, and a second insulating layer thinner than the first insulating layer formed on the first surface of the first insulating layer so as to cover the second wiring layer. The first wiring layer comprises a pad and a plane layer provided around the pad. One end surface of the via wiring is exposed from the first surface of the first insulating layer and directly bonded to the second wiring layer. The other end surface of the via wiring is directly bonded to the pad in the first insulating layer.

Abstract: A wiring board includes a first wiring layer formed on one surface of a core layer, a first insulating layer formed on the one surface of the core layer so as to cover the first wiring layer, a via wiring embedded in the first insulating layer, a second wiring layer formed on a first surface of the first insulating layer, and a second insulating layer thinner than the first insulating layer formed on the first surface of the first insulating layer so as to cover the second wiring layer. The first wiring layer comprises a pad and a plane layer provided around the pad. One end surface of the via wiring is exposed from the first surface of the first insulating layer and directly bonded to the second wiring layer. The other end surface of the via wiring is directly bonded to the pad in the first insulating layer.

Abstract: A wiring substrate includes a first insulation layer containing insulating resin, a first through hole passing through the first insulation layer is the thickness direction, a pad formed within the first through hole, a second insulation layer containing insulating resin and laminated on a first surface of the first insulation layer, and a first wiring layer provided on the second insulation layer and connecting to the pad. A connecting surface of the pad that connects the first wiring layer includes a curved surface that curves in a protruding shape toward the first surface of the first insulation layer.

Abstract: A circuit board includes: an insulating layer having at least a part formed of an insulating resin; and an electrode pad embedded in the insulating layer and having a neck formed on an outer side surface, the neck being held in contact with the insulating resin of the insulating layer. The electrode pad includes: a first conductor layer having an end surface exposed from one surface of the insulating layer; and a second conductor layer formed on the first conductor layer and having a grain boundary density different from a grain boundary density of the first conductor layer. The neck is formed in a region of the outer side surface, the region corresponding to a boundary part between the first conductor layer and the second conductor layer.

Abstract: A wiring board includes a first wiring layer formed on one surface of a core layer, a first insulating layer formed on the one surface of the core layer so as to cover the first wiring layer, a via wiring embedded in the first insulating layer, a second wiring layer formed on a first surface of the first insulating layer, and a second insulating layer thinner than the first insulating layer formed on the first surface of the first insulating layer so as to cover the second wiring layer. The first wiring layer comprises a pad and a plane layer provided around the pad. One end surface of the via wiring is exposed from the first surface of the first insulating layer and directly bonded to the second wiring layer. The other end surface of the via wiring is directly bonded to the pad in the first insulating layer.

Abstract: A wiring substrate includes a first insulation layer containing insulating resin, a first through hole passing through the first insulation layer is the thickness direction, a pad formed within the first through hole, a second insulation layer containing insulating resin and laminated on a first surface of the first insulation layer, and a first wiring layer provided on the second insulation layer and connecting to the pad. A connecting surface of the pad that connects the first wiring layer includes a curved surface that curves in a protruding shape toward the first surface of the first insulation layer.

Abstract: A circuit board includes: an insulating layer having at least a part formed of an insulating resin; and an electrode pad embedded in the insulating layer and having a neck formed on an outer side surface, the neck being held in contact with the insulating resin of the insulating layer. The electrode pad includes: a first conductor layer having an end surface exposed from one surface of the insulating layer; and a second conductor layer formed on the first conductor layer and having a grain boundary density different from a grain boundary density of the first conductor layer. The neck is formed in a region of the outer side surface, the region corresponding to a boundary part between the first conductor layer and the second conductor layer.

Abstract: A film-forming method for forming a film in a film-forming apparatus includes generating first gas molecular species and second gas molecular species by causing the first source gas and the second source gas accumulated in the accumulation mechanisms to pass through respective instantaneously-heating units, sharply raising partial pressure of the first gas molecular species and partial pressure of the second gas molecular species by projectingly supplying the first gas molecular species and the second gas molecular species to the reaction chamber in which the substrate has been placed, which has been depressurized, and which has a constant capacity; bringing the first gas molecular species or the second gas molecular species into reaction by alternately repeatedly guiding the first gas molecular species or the second gas molecular species to a surface of the substrate, and forming a compound film on the surface of the substrate.

Abstract: A wiring substrate includes a first wiring structure and a second wiring structure. The first wiring structure includes a first insulating layer, which covers a first wiring layer, and a via wiring. A first through hole of the first insulating layer is filled with the via wiring. The second wiring structure includes a second wiring layer and a second insulating layer. The second wiring layer is formed on an upper surface of the first insulating layer and an upper end surface of the via wiring. The second wiring layer partially includes a roughened surface. The second insulating layer is stacked on the upper surface of the first insulating layer and covers the second wiring layer. The second wiring structure has a higher wiring density than the first wiring structure. The roughened surface of the second wiring layer has a smaller surface roughness than the first wiring layer.

Abstract: An operation state determination system includes a receiver, a first memory and a determiner. The determiner is configured to compare, at a prescribed determination time point, a power value stored in the first memory with a reference value to determine whether or not an electric load connected to a branch circuit is in operation, and output a signal in accordance with a determination result. The determiner is further configured to determine that the electric load is in operation at the prescribed determination time point, when a time period during which the power value is equal to or more than the reference value occurs within a comparison time in past before the prescribed determination time point.

Abstract: A wiring board includes: a first wiring structure including: a first insulating layer; a first wiring layer; and a via wiring; a protective insulating layer formed on the lower surface of the first insulating layer to cover a side surface of a lower portion of the first wiring layer; and a second wiring structure having an insulating layer and a wiring layer and formed on the upper surface of the first insulating layer. The upper surface of the first insulating layer and the upper end surface of the via wiring are substantially flush with each other. A wiring density of the second wiring structure is higher than a wiring density of the first wiring structure. The reinforcing material is positioned on a side of the second wiring structure with respect to a center of the first insulating layer in the thickness direction of the first insulating layer.

Abstract: A wiring substrate includes a first wiring structure and a second wiring structure having a higher wiring density. The second wiring structure includes a wiring layer formed on a first insulation layer of the first wiring structure. The wiring layer includes a first wiring pattern, the upper surface of which includes smooth and rough surfaces. A protective film, formed from a conductive material having a higher migration resistance than the wiring layer, covers only the smooth surface and includes a smooth upper surface. A second insulation layer stacked on the first insulation layer covers the wiring layer and the protective film. The smooth surface is continuous with and downwardly recessed from the smooth surface to expose a peripheral portion of the protective film. The second insulation layer covers upper, lower, and side surfaces of the peripheral portion.

Abstract: A wiring board includes: a first insulating layer; a first wiring layer formed on a lower surface of the first insulating layer; a first through hole which penetrates the first insulating layer; a first via wiring including: a filling portion formed to fill the first through hole; and a protruding portion protruding upward from an upper surface of the first insulating layer; a second wiring layer including a land, wherein the land includes an outer circumferential portion and a central portion, a second insulating layer formed on the upper surface of the first insulating layer; a second through hole which penetrates the second insulating layer in the thickness direction; a second via wiring formed to fill the second through hole; and a third wiring layer formed on an upper surface of the second insulating layer.