Patents by Inventor Noriyuki Kakimoto

Noriyuki Kakimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11817429
    Abstract: A semiconductor device includes: multiple semiconductor elements each having a one surface and a rear surface in a plate thickness direction; a first member that sandwiches the multiple semiconductor elements and is electrically connected to an electrode on the one surface; a second member electrically connected to an electrode on the rear surface; and multiple terminals that are continuous from the first or second member. An area of the second member is smaller than that of the first member. Semiconductor elements are arranged in a longitudinal direction of the second member. The semiconductor device further includes a first joint portion that electrically connects each semiconductor element and the second member and a second joint portion that electrically connects a terminal and the second member. The multiple solder joint portions are symmetrically placed.
    Type: Grant
    Filed: September 2, 2021
    Date of Patent: November 14, 2023
    Assignee: DENSO CORPORATION
    Inventors: Noriyuki Kakimoto, Hiroshi Ishino, Shinji Hiramitsu
  • Patent number: 11538794
    Abstract: A power converter includes: at least one pair of first and second semiconductor devices including multiple first and second semiconductor chips, having first and second switching elements providing upper and lower arms, and multiple first and second main terminals having at least one of multiple first and second high potential terminals and multiple first and second low potential terminals; and a bridging member providing an upper and lower coupling portion, together with the first low and second high potential terminals. The first and second semiconductor chips are arranged in line symmetry with respect to first and second axes and in line symmetry with the second axis as a symmetry axis to differentiate the arrangement of the second low potential terminal with respect to the second high potential terminal from the arrangement of the first low potential terminal with respect to the first high potential terminal.
    Type: Grant
    Filed: June 17, 2020
    Date of Patent: December 27, 2022
    Assignee: DENSO CORPORATION
    Inventors: Tetsuya Matsuoka, Yuu Yamahira, Kazuma Fukushima, Noriyuki Kakimoto
  • Publication number: 20220278030
    Abstract: A semiconductor device has a joint part in which a first conducting part and a second conducting part are joined by a joint material. The first conducting part has a high wettability region and a low wettability region in a surface opposite to the second conducting part. The low wettability region is adjacent to the high wettability region to define an outer periphery of the high wettability region and has wettability lower than the high wettability region to the joint material. The high wettability region has an overlap region overlapping a formation region of the joint part in the second conducting part in a planar view, and a non-overlap region connected to the overlap region and not overlapping the formation region of the joint part in the second conducting part. The non-overlap region includes a holding region capable of holding the joint material that is surplus for the joint part.
    Type: Application
    Filed: May 18, 2022
    Publication date: September 1, 2022
    Inventors: Syunsuke ARAI, Masayoshi NISHIHATA, Shinji HIRAMITSU, Noriyuki KAKIMOTO
  • Publication number: 20210398951
    Abstract: A semiconductor device includes: multiple semiconductor elements each having a one surface and a rear surface in a plate thickness direction; a first member that sandwiches the multiple semiconductor elements and is electrically connected to an electrode on the one surface; a second member electrically connected to an electrode on the rear surface; and multiple terminals that are continuous from the first or second member. An area of the second member is smaller than that of the first member. Semiconductor elements are arranged in a longitudinal direction of the second member. The semiconductor device further includes a first joint portion that electrically connects each semiconductor element and the second member and a second joint portion that electrically connects a terminal and the second member. The multiple solder joint portions are symmetrically placed.
    Type: Application
    Filed: September 2, 2021
    Publication date: December 23, 2021
    Inventors: NORIYUKI KAKIMOTO, HIROSHI ISHINO, SHINJI HIRAMITSU
  • Patent number: 10848078
    Abstract: In a power converter, a control circuit has a speed adjustment resistor that limits a control current to adjust a switching speed of each of first and second switching elements. The speed adjustment resistor has a resistance that varies depending on a voltage at the control electrode of each of the first and second switching elements. A feedback route connects between the control electrode of the first switching element and the control electrode of the second switching element. The feedback route has a resistance that is set to be lower than a value of the resistance of the speed adjustment resistor during a predetermined Miller period of each of the first and second switching elements.
    Type: Grant
    Filed: July 30, 2019
    Date of Patent: November 24, 2020
    Assignee: DENSO CORPORATION
    Inventors: Yuu Yamahira, Tetsuya Matsuoka, Kazuma Fukushima, Akifumi Araragi, Noriyuki Kakimoto, Masakiyo Sumitomo
  • Publication number: 20200321319
    Abstract: A power converter includes: at least one pair of first and second semiconductor devices including multiple first and second semiconductor chips, having first and second switching elements providing upper and lower arms, and multiple first and second main terminals having at least one of multiple first and second high potential terminals and multiple first and second low potential terminals; and a bridging member providing an upper and lower coupling portion, together with the first low and second high potential terminals. The first and second semiconductor chips are arranged in line symmetry with respect to first and second axes and in line symmetry with the second axis as a symmetry axis to differentiate the arrangement of the second low potential terminal with respect to the second high potential terminal from the arrangement of the first low potential terminal with respect to the first high potential terminal.
    Type: Application
    Filed: June 17, 2020
    Publication date: October 8, 2020
    Applicant: DENSO CORPORATION
    Inventors: Tetsuya MATSUOKA, Yuu YAMAHIRA, Kazuma FUKUSHIMA, Noriyuki KAKIMOTO
  • Publication number: 20200036297
    Abstract: In a power converter, a control circuit has a speed adjustment resistor that limits a control current to adjust a switching speed of each of first and second switching elements. The speed adjustment resistor has a resistance that varies depending on a voltage at the control electrode of each of the first and second switching elements. A feedback route connects between the control electrode of the first switching element and the control electrode of the second switching element. The feedback route has a resistance that is set to be lower than a value of the resistance of the speed adjustment resistor during a predetermined Miller period of each of the first and second switching elements.
    Type: Application
    Filed: July 30, 2019
    Publication date: January 30, 2020
    Applicant: DENSO CORPORATION
    Inventors: Yuu YAMAHIRA, Tetsuya MATSUOKA, Kazuma FUKUSHIMA, Akifumi ARARAGI, Noriyuki KAKIMOTO, Masakiyo SUMITOMO
  • Patent number: 10490638
    Abstract: A semiconductor device may include: a semiconductor substrate; a surface electrode covering a surface of the semiconductor substrate; an insulating protection film covering a part of a surface of the surface electrode; and a solder-bonding metal film, the solder-bonding metal film covering a range spreading from a surface of the insulating protection film to the surface of the surface electrode, wherein the surface electrode may include: a first metal film provided on the semiconductor substrate; a second metal film being in contact with a surface of the first metal film, and having tensile strength higher than tensile strength of the first metal film; and a third metal film being in contact with a surface of the second metal film, and having tensile strength which is lower than the tensile strength of the second metal film and is higher than the tensile strength of the first metal film.
    Type: Grant
    Filed: January 23, 2018
    Date of Patent: November 26, 2019
    Assignees: TOYOTA JIDOSHA KABUSHIKI KAISHA, DENSO CORPORATION
    Inventors: Takashi Kuno, Hiroki Tsuma, Satoshi Kuwano, Akitaka Soeno, Toshitaka Kanemaru, Kenta Hashimoto, Noriyuki Kakimoto, Shuji Yoneda
  • Patent number: 10438852
    Abstract: A semiconductor device includes: reverse conducting switching elements-in each of which a diode element and a switching element are arranged in parallel on a single semiconductor substrate; a driver applying a gate voltage to a plurality of gate electrodes in the reverse conducting switching elements; and a mode determination unit determining whether a forward conduction mode in which a current mainly flows through the switching element or a reverse conduction mode in which the current flows through the diode element is being operated.
    Type: Grant
    Filed: December 16, 2016
    Date of Patent: October 8, 2019
    Assignee: DENSO CORPORATION
    Inventor: Noriyuki Kakimoto
  • Publication number: 20190051648
    Abstract: A diode includes a first-conductivity-type barrier region disposed between a drift region and a second impurity region and having an impurity concentration higher than that of the drift region and a second-conductivity-type field extension prevention region disposed between the barrier region and the drift region. The diode also includes a trench gate disposed to extend from a second main surface of a semiconductor substrate through the second impurity region and the barrier region and reach the field extension prevention region. The trench gate has a gate electrode for applying a gate voltage. A gate electrode is applied with a parasitic gate voltage, as the gate voltage. The parasitic gate voltage has an absolute value of a potential difference with a second electrode being equal to or greater than a threshold voltage of a parasitic transistor formed of the second impurity region, the barrier region, and the field extension prevention region.
    Type: Application
    Filed: December 19, 2016
    Publication date: February 14, 2019
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Noriyuki KAKIMOTO, Masaru SENOO
  • Publication number: 20180308757
    Abstract: A semiconductor device includes: reverse conducting switching elements-in each of which a diode element and a switching element are arranged in parallel on a single semiconductor substrate; a driver applying a gate voltage to a plurality of gate electrodes in the reverse conducting switching elements; and a mode determination unit determining whether a forward conduction mode in which a current mainly flows through the switching element or a reverse conduction mode in which the current flows through the diode element is being operated.
    Type: Application
    Filed: December 16, 2016
    Publication date: October 25, 2018
    Inventor: Noriyuki KAKIMOTO
  • Patent number: 10110219
    Abstract: A driving apparatus configured to drive a plurality of switching elements including a first switching element and a second switching element, and each of the plurality of switching elements has a gate electrode. The driving apparatus includes: a driving circuit configured to supply a voltage to the gate electrode; and a controller configured to control the plurality of switching elements to turn on or off. The controller includes a control mode having a multi-driving mode configured to drive both of the first switching element and the second switching element, and a single driving mode configured to drive only the first switching element. The controller at the single driving mode sets a gate voltage to be applied to a gate electrode of the first switching element at a clamping voltage, which is smaller than the gate voltage of the first switching element at the multi-driving mode.
    Type: Grant
    Filed: May 18, 2016
    Date of Patent: October 23, 2018
    Assignee: DENSO CORPORATION
    Inventor: Noriyuki Kakimoto
  • Publication number: 20180212028
    Abstract: A semiconductor device may include: a semiconductor substrate; a surface electrode covering a surface of the semiconductor substrate; an insulating protection film covering a part of a surface of the surface electrode; and a solder-bonding metal film, the solder-bonding metal film covering a range spreading from a surface of the insulating protection film to the surface of the surface electrode, wherein the surface electrode may include: a first metal film provided on the semiconductor substrate; a second metal film being in contact with a surface of the first metal film, and having tensile strength higher than tensile strength of the first metal film; and a third metal film being in contact with a surface of the second metal film, and having tensile strength which is lower than the tensile strength of the second metal film and is higher than the tensile strength of the first metal film.
    Type: Application
    Filed: January 23, 2018
    Publication date: July 26, 2018
    Applicants: TOYOTA JIDOSHA KABUSHIKI KAISHA, DENSO CORPORATION
    Inventors: Takashi KUNO, Hiroki TSUMA, Satoshi KUWANO, Akitaka SOENO, Toshitaka KANEMARU, Kenta HASHIMOTO, Noriyuki KAKIMOTO, Shuji YONEDA
  • Publication number: 20180138905
    Abstract: A driving apparatus configured to drive a plurality of switching elements including a first switching element and a second switching element, and each of the plurality of switching elements has a gate electrode. The driving apparatus includes: a driving circuit configured to supply a voltage to the gate electrode; and a controller configured to control the plurality of switching elements to turn on or off. The controller includes a control mode having a multi-driving mode configured to drive both of the first switching element and the second switching element, and a single driving mode configured to drive only the first switching element. The controller at the single driving mode sets a gate voltage to be applied to a gate electrode of the first switching element at a clamping voltage, which is smaller than the gate voltage of the first switching element at the multi-driving mode.
    Type: Application
    Filed: May 18, 2016
    Publication date: May 17, 2018
    Inventor: Noriyuki KAKIMOTO
  • Patent number: 9929073
    Abstract: A semiconductor device includes: a first power semiconductor element; a second power semiconductor element that is connected in parallel with the first power semiconductor element; a voltage changing unit that changes a voltage applied to a control terminal of the first power semiconductor element when the second power semiconductor element is turned on; a detection unit that detects a current flowing in the first power semiconductor element when the voltage changing unit has changed the voltage applied to the control terminal of the first power semiconductor element; and a temperature estimation unit that estimates a temperature of the first power semiconductor element based on a characteristic of the change of the current of the first power semiconductor element with respect to a change of the voltage applied to the first power semiconductor element.
    Type: Grant
    Filed: May 7, 2016
    Date of Patent: March 27, 2018
    Assignee: DENSO CORPORATION
    Inventor: Noriyuki Kakimoto
  • Patent number: 9865728
    Abstract: A switching device including a semiconductor substrate including a trench (gate electrode) extending in a mesh shape is provided, and the upper surface of the semiconductor substrate is covered by the interlayer insulating film. Within an element range a contact hole is provided in an interlayer insulating film above each cell region while within a surrounding range an entire upper surface of each cell region is covered by the interlayer insulating film. The first metal layer covers the interlayer insulating film, and has recesses above the contact holes. The insulating protective film covers an outer peripheral side portion of the first metal layer within the surrounding range. The second metal layer covers the first metal layer within an opening of the insulating protective film. Within the surrounding range, a second conductivity-type region extending to below lower ends of the trench and is electrically connected to the body region, is provided.
    Type: Grant
    Filed: February 6, 2017
    Date of Patent: January 9, 2018
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Akitaka Soeno, Masaru Senoo, Takashi Kuno, Satoshi Kuwano, Noriyuki Kakimoto, Toshitaka Kanemaru, Kenta Hashimoto, Yuma Kagata
  • Publication number: 20170358512
    Abstract: A semiconductor device includes: a first power semiconductor element; a second power semiconductor element that is connected in parallel with the first power semiconductor element; a voltage changing unit that changes a voltage applied to a control terminal of the first power semiconductor element when the second power semiconductor element is turned on; a detection unit that detects a current flowing in the first power semiconductor element when the voltage changing unit has changed the voltage applied to the control terminal of the first power semiconductor element; and a temperature estimation unit that estimates a temperature of the first power semiconductor element based on a characteristic of the change of the current of the first power semiconductor element with respect to a change of the voltage applied to the first power semiconductor element.
    Type: Application
    Filed: May 7, 2016
    Publication date: December 14, 2017
    Inventor: Noriyuki KAKIMOTO
  • Publication number: 20170263754
    Abstract: A switching device including a semiconductor substrate including a trench (gate electrode) extending in a mesh shape is provided, and the upper surface of the semiconductor substrate is covered by the interlayer insulating film. Within an element range a contact hole is provided in an interlayer insulating film above each cell region while within a surrounding range an entire upper surface of each cell region is covered by the interlayer insulating film. The first metal layer covers the interlayer insulating film, and has recesses above the contact holes. The insulating protective film covers an outer peripheral side portion of the first metal layer within the surrounding range. The second metal layer covers the first metal layer within an opening of the insulating protective film. Within the surrounding range, a second conductivity-type region extending to below lower ends of the trench and is electrically connected to the body region, is provided.
    Type: Application
    Filed: February 6, 2017
    Publication date: September 14, 2017
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Akitaka SOENO, Masaru SENOO, Takashi KUNO, Satoshi KUWANO, Noriyuki KAKIMOTO, Toshitaka KANEMARU, Kenta HASHIMOTO, Yuma KAGATA
  • Patent number: 9143079
    Abstract: A power converter includes an output circuit and a control circuit. The output circuit has an upper switching device connected to a direct-current power source and a lower switching device connected in series with the upper switching device. The output circuit supplies power to a load from a connection point between the switching devices. The control circuit supplies pulse-modulated control signals to the switching devices to turn ON and OFF the switching devices. The control circuit variably sets a switching speed and a dead-time of the switching devices in such a manner that as the switching speed becomes slower, the dead-time becomes longer.
    Type: Grant
    Filed: June 25, 2013
    Date of Patent: September 22, 2015
    Assignee: DENSO CORPORATION
    Inventor: Noriyuki Kakimoto
  • Patent number: 8839509
    Abstract: Multiple high-voltage side and low-voltage side electric conductors are formed from one sheet of a conductive plate in such a way that the multiple electric conductors are arranged in parallel to one another across an initial gap between the high-voltage side and the low-voltage side electric conductors. The multiple electric conductors are connected to one another via connecting portions. An intermediate portion of the connecting portion is deformed so as to reduce the initial gap to a smaller adjusted gap. Portions of the electric conductors as well as switching devices mounted to the electric conductors are sealed by sealing material. The connecting portions are cut away so that the electric conductors are finally separated from one another.
    Type: Grant
    Filed: August 28, 2012
    Date of Patent: September 23, 2014
    Assignee: DENSO CORPORATION
    Inventors: Noriyuki Kakimoto, Masao Yamada