Patents by Inventor Noriyuki NAGAHATA

Noriyuki NAGAHATA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240074170
    Abstract: A memory device includes an alternating stack of insulating layers and electrically conductive layers arranged along a vertical direction, a memory opening vertically extending through the alternating stack, and a memory opening fill structure located in the memory opening and including a vertical semiconductor channel and a memory film. The memory film includes a blocking dielectric film, a tunneling dielectric layer and a vertical stack of memory elements located between the blocking dielectric film and the tunneling dielectric layer. The blocking dielectric film includes component layers which include, from a side that is proximal to the vertical stack of memory elements toward a side that is distal from the vertical stack of memory elements, an inner silicon oxide blocking dielectric layer, a middle dielectric metal oxide blocking dielectric layer, an outer silicon oxide blocking dielectric layer, and an outer dielectric metal oxide blocking dielectric layer.
    Type: Application
    Filed: August 31, 2022
    Publication date: February 29, 2024
    Inventors: Takashi YUDA, Noriyuki NAGAHATA, Ippei YASUDA
  • Publication number: 20230354608
    Abstract: A method of forming a memory device includes forming an alternating stack of disposable material layers and silicon nitride layers over a substrate, forming a memory opening through the alternating stack, forming a memory film in the memory opening, forming a vertical semiconductor channel over the memory film in the memory opening, forming a backside trench through the alternating stack, forming laterally-extending cavities by removing the disposable material layers selective to the silicon nitride layers through the backside trench, oxidizing portions of the silicon nitride layers exposed in the laterally-extending cavities to form insulating layers, and replacing remaining portions of the silicon nitride layers with electrically conductive layers.
    Type: Application
    Filed: June 29, 2023
    Publication date: November 2, 2023
    Inventors: Noriyuki NAGAHATA, Masanori TSUTSUMI, Fei ZHOU, Raghuveer S. MAKALA
  • Publication number: 20220109003
    Abstract: A memory device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, a memory opening vertically extending through the alternating stack, and a memory opening fill structure located in the memory opening. The memory opening fill structure includes a memory film and a vertical semiconductor channel. The memory film includes a tunneling dielectric layer, a charge storage layer that laterally surrounds the tunneling dielectric layer, a dielectric metal oxide blocking dielectric layer that laterally surrounds the charge storage layer and contacts the vertical semiconductor channel, and a silicon oxide blocking dielectric layer that laterally surrounds the dielectric metal oxide blocking dielectric layer and contacts the vertical semiconductor channel.
    Type: Application
    Filed: October 7, 2020
    Publication date: April 7, 2022
    Inventors: Noriyuki NAGAHATA, Takashi YUDA, Ryousuke ITOU