Patents by Inventor Noriyuki Yoshikawa
Noriyuki Yoshikawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8274125Abstract: An insulation is provided in a portion surrounding a light receiving portion in a semiconductor element, and a sealing resin is provided around the insulation, thereby warping the insulation outward when viewed from the light receiving portion to prevent diffuse light from returning to the light receiving portion of the semiconductor element.Type: GrantFiled: February 26, 2009Date of Patent: September 25, 2012Assignee: Panasonic CorporationInventors: Junya Furuyashiki, Noriyuki Yoshikawa, Toshiyuki Fukuda, Toshimasa Itooka, Hiroki Utatsu
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Publication number: 20110215343Abstract: By increasing the width of a lead terminal 2 connected to a die pad 1 in the vicinity of the die pad 1 and forming a slit 9 and a projecting plate in the lead terminal in the region where resin 5 is formed, it is possible to ensure the holding strength of the lead terminal by the resin 5, as well as ensuring the strength of the lead terminal during the manufacturing process and achieving a reduction in thickness.Type: ApplicationFiled: May 2, 2011Publication date: September 8, 2011Applicant: Panasonic CorporationInventors: Noriyuki Yoshikawa, Hiroyuki Ishida
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Patent number: 7970033Abstract: A semiconductor device includes: a first lead having an element mounting portion; a second lead located in a same plane as the first lead, with a predetermined space left between the first lead and the second lead; a molding encapsulant made of a resin for fixing the leads; and a semiconductor element affixed to a top surface of the element mounting portion of the first lead. The molding encapsulant covers at least part of each of upper and lower surfaces of the leads. A resin injection hole mark, which is a mark of a hole through which the encapsulant has been injected, is left on the encapsulant, and part of the resin injection hole mark is located above the first lead or the second lead, and the remaining part of the resin injection hole mark is located above a space between the first lead and the second lead.Type: GrantFiled: July 28, 2009Date of Patent: June 28, 2011Assignee: Panasonic CorporationInventors: Masanori Minamio, Noriyuki Yoshikawa, Shinichi Ijima
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Patent number: 7961585Abstract: By increasing the width of a lead terminal 2 connected to a die pad 1 in the vicinity of the die pad 1 and forming a slit 9 and a projecting plate in the lead terminal in the region where resin 5 is formed, it is possible to ensure the holding strength of the lead terminal by the resin 5, as well as ensuring the strength of the lead terminal during the manufacturing process and achieving a reduction in thickness.Type: GrantFiled: December 10, 2008Date of Patent: June 14, 2011Assignee: Panasonic CorporationInventors: Noriyuki Yoshikawa, Hiroyuki Ishida
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Patent number: 7949023Abstract: A semiconductor laser apparatus of the present invention includes: a semiconductor laser chip 1 having an electrode 11 formed on a surface of the semiconductor laser chip 1; a heat sink 3 for the semiconductor laser chip 1; a submount 2 disposed between the semiconductor laser chip 1 and the heat sink 3 and bonded to the semiconductor laser chip 1 and the heat sink 3; and recessed marks 13 formed on the surface of the semiconductor laser chip 1 by partially removing the electrode 11, wherein the semiconductor laser chip 1 is longer in the resonator direction than in a direction orthogonal to the resonator direction, and the recessed marks 13 are disposed within a predetermined distance from each of the front and rear end faces of the semiconductor laser chip.Type: GrantFiled: November 6, 2009Date of Patent: May 24, 2011Assignee: Panasonic CorporationInventor: Noriyuki Yoshikawa
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Patent number: 7939901Abstract: An optical element mounted on a wiring board is sealed by a sealing resin except an optical function region. Wires connecting the wiring board with the optical element are also sealed by the sealing resin. The optical function region is exposed as a bottom surface of a recess whose side surface is formed by the sealing resin. A boundary portion between the side surface of the recess and a top surface portion and a boundary portion between the side surface and bottom surface of the recess have a rounded shape.Type: GrantFiled: September 3, 2008Date of Patent: May 10, 2011Assignee: Panasonic CorporationInventors: Masanori Minamio, Hiroyuki Ishida, Noriyuki Yoshikawa
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Publication number: 20110080928Abstract: To provide a laser device having high strength against mechanical stress. The laser device includes: a laser element; a plate-like lead frame including through-holes, and on whose front plane the laser element is mounted; lead terminals; trenches provided between an end of the lead frame in a laser emission direction of the laser element and the through-holes; and a resin dam formed on the front plane of the lead frame using a molding resin to protrude in an area surrounding the laser element including positions of the through-holes, and having an open part in the laser emission direction. The molding resin further fills the through-holes and the trenches, and bonds the lead frame and the resin dam by sealing together a part of each of the lead terminals and a part of the front plane and the back plane of the lead frame, in a vicinity of the lead terminals.Type: ApplicationFiled: September 22, 2010Publication date: April 7, 2011Applicant: PANASONIC CORPORATIONInventors: Noriyuki YOSHIKAWA, Yasutake YAGUCHI
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Publication number: 20110001208Abstract: An insulation is provided in a portion surrounding a light receiving portion in a semiconductor element, and a sealing resin is provided around the insulation, thereby warping the insulation outward when viewed from the light receiving portion to prevent diffuse light from returning to the light receiving portion of the semiconductor element.Type: ApplicationFiled: February 26, 2009Publication date: January 6, 2011Inventors: Junya Furuyashiki, Noriyuki Yoshikawa, Toshiyuki Fukuda, Toshimasa Itooka, Hiroki Utatsu
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Publication number: 20100308468Abstract: In a semiconductor device made of a plurality of materials, if the device is fabricated through a step of cutting the bonded plurality of materials, a boundary line of the plurality of materials is exposed on a cutting plane. Internal stress in the cutting remains at this boundary line to allow moisture and corrosive gas to easily enter into the device. In order to reduce the entrance of the moisture, the gas, and the like, the boundary appearing on the cutting plane is covered by a covering layer. At this time, partial cutting exposing the boundary line and not separating semiconductor devices are performed so that the covering layer can be formed with the plurality of semiconductor devices attached to the substrate.Type: ApplicationFiled: March 2, 2009Publication date: December 9, 2010Inventors: Noriyuki Yoshikawa, Toshiyuki Fukuda, Junya Furuyashiki, Toshimasa Itooka, Hiroki Utatsu
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Patent number: 7822090Abstract: A semiconductor device includes an optical semiconductor element, a package including a base made of a metal for mounting the optical semiconductor element, and a cap for encapsulating the optical semiconductor element and a gas by covering the package and the optical semiconductor element. The gas encapsulated with the package has an oxygen concentration not less than 15% and less than 30% and has a dew-point not less than ?15° C. and not more than ?5° C.Type: GrantFiled: August 6, 2008Date of Patent: October 26, 2010Assignee: Panasonic CorporationInventors: Masanori Minamio, Noriyuki Yoshikawa, Shinichi Ijima, Toshiyuki Fukuda
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Publication number: 20100158059Abstract: A semiconductor laser apparatus of the present invention includes: a semiconductor laser chip 1 having an electrode 11 formed on a surface of the semiconductor laser chip 1; a heat sink 3 for the semiconductor laser chip 1; a submount 2 disposed between the semiconductor laser chip 1 and the heat sink 3 and bonded to the semiconductor laser chip 1 and the heat sink 3; and recessed marks 13 formed on the surface of the semiconductor laser chip 1 by partially removing the electrode 11, wherein the semiconductor laser chip 1 is longer in the resonator direction than in a direction orthogonal to the resonator direction, and the recessed marks 13 are disposed within a predetermined distance from each of the front and rear end faces of the semiconductor laser chip.Type: ApplicationFiled: November 6, 2009Publication date: June 24, 2010Applicant: PANASONIC CORPORATIONInventor: Noriyuki Yoshikawa
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Publication number: 20100157629Abstract: A switching power supply includes: a blanking period generating circuit for prohibiting a main switching element from being turned on from the time the main switching element is turned on to the time a blanking time elapses; a soft start period generating circuit for generating a soft start period from the start of the oscillation of the main switching element to the lapse of a soft start time; and a blanking time adjusting circuit for generating a signal for shortening the blanking time in the soft start period as compared with after the lapse of the soft start period.Type: ApplicationFiled: November 6, 2009Publication date: June 24, 2010Applicant: PANASONIC CORPORATIONInventor: Noriyuki Yoshikawa
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Patent number: 7719119Abstract: A semiconductor device has upper electrodes and external terminals which are protruding above the both surfaces of a substrate for semiconductor device and connected to each other by penetrating electrodes, a first insulating film covering at least a metal pattern except for the portions of the first insulating film corresponding to the upper electrodes, a second insulating film covering at least another metal pattern except for the portions of the second insulating film corresponding to the external terminals, and a semiconductor element connected to the upper electrodes and placed on the substrate for semiconductor device. The solder-connected surface of the external terminal is positioned to have a height larger than that of a surface of the second insulating film. The semiconductor element is placed on the first insulating film and covered, together with the upper electrodes, with a mold resin.Type: GrantFiled: October 23, 2006Date of Patent: May 18, 2010Assignee: Panasonic CorporationInventors: Noriyuki Yoshikawa, Noboru Takeuchi, Kenichi Itou, Toshiyuki Fukuda
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Publication number: 20100091633Abstract: A flat pre-board plate including connection electrodes, internal interconnections, and external-connection portions is prepared. This pre-board plate is cut at portions each located between adjacent ones of the connection electrodes, thereby forming trenches. A plurality of semiconductor elements are placed in each of the trenches. Electrode pads and the connection electrodes are connected to each other by metal wires. Transparent lids are placed on, and bonded to, spacers to cover the semiconductor elements. Thereafter, two lines of the connection electrodes arranged between adjacent ones of the trenches are separated from each other. Subsequently, adjacent ones of the semiconductor elements are also separated from each other.Type: ApplicationFiled: March 10, 2008Publication date: April 15, 2010Inventors: Junya FuruyashikiI, Syouzou Moribe, Hiroki Utatsu, Noriyuki Yoshikawa, Toshiyuki Fukuda, Masanori Minamio, Hiroyuki Ishida
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Publication number: 20100091630Abstract: A plurality of parallel rib prototypes are provided on a flat base plate. A plurality of semiconductor elements are placed in each trench between adjacent ones of the rib prototypes, and a transparent member is bonded to each of the semiconductor elements. Electrode pads of the semiconductor elements are wire bonded to connection electrodes. The trenches are then filled with an encapsulating resin. Thereafter, middle portions, in the longitudinal direction, of the rib prototypes are cut with a dicing saw, and adjacent ones of the semiconductor elements are separated from each other, thereby obtaining semiconductor devices.Type: ApplicationFiled: March 10, 2008Publication date: April 15, 2010Inventors: Junya Furuyashiki, Syouzou Moribe, Hiroki Utatsu, Noriyuki Yoshikawa, Toshiyuki Fukuda, Masanori Minamio, Hiroyuki Ishida
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Publication number: 20100046564Abstract: A semiconductor device includes: a first lead having an element mounting portion; a second lead located in a same plane as the first lead, with a predetermined space left between the first lead and the second lead; a molding encapsulant made of a resin for fixing the leads; and a semiconductor element affixed to a top surface of the element mounting portion of the first lead. The molding encapsulant covers at least part of each of upper and lower surfaces of the leads. A resin injection hole mark, which is a mark of a hole through which the encapsulant has been injected, is left on the encapsulant, and part of the resin injection hole mark is located above the first lead or the second lead, and the remaining part of the resin injection hole mark is located above a space between the first lead and the second lead.Type: ApplicationFiled: July 28, 2009Publication date: February 25, 2010Inventors: Masanori Minamio, Noriyuki Yoshikawa, Shinichi Ijima
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Publication number: 20100008203Abstract: A semiconductor element is mounted on a rectangular base of a package including the base and ribs provided on a pair of opposite external edges of the base. Electrode pads of the semiconductor element and connection electrodes provided on rib upper surfaces are connected to each other by metal wires. On the rib upper surfaces, spacers are provided at locations closer to the outside than the connection electrodes. A transparent lid adheres to the upper surfaces of the spacers to cover the entire surface of the package. The height of the spacers is greater than the diameter of the metal wires.Type: ApplicationFiled: March 10, 2008Publication date: January 14, 2010Inventors: Junya Furuyashiki, Syouzou Moribe, Hiroki Utatsu, Noriyuki Yoshikawa, Toshiyuki Fukuda, Masanori Minamio, Hiroyuki Ishida
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Publication number: 20100001174Abstract: In a semiconductor device, a semiconductor element is mounted on a substantially rectangular package. First ribs are respectively provided on a pair of opposite external edges of a mounting surface and project upward from the pair of opposite external edges. External edges of a lid are placed on the upper surfaces of the first ribs, and fixed thereto with an adhesive. Dams are provided on external edges of the first rib upper surfaces. The adhesive is continuously present from side surfaces of the lid to the dams.Type: ApplicationFiled: March 10, 2008Publication date: January 7, 2010Inventors: Junya Furuyashiki, Syouzuo Moribe, Hiroki Utatsu, Noriyuki Yoshikawa, Toshiyuki Fukuda, Masanori Minamio, Hiroyuki Ishida
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Publication number: 20090154321Abstract: By increasing the width of a lead terminal 2 connected to a die pad 1 in the vicinity of the die pad 1 and forming a slit 9 and a projecting plate in the lead terminal in the region where resin 5 is formed, it is possible to ensure the holding strength of the lead terminal by the resin 5, as well as ensuring the strength of the lead terminal during the manufacturing process and achieving a reduction in thickness.Type: ApplicationFiled: December 10, 2008Publication date: June 18, 2009Applicant: Panasonic CorporationInventors: Noriyuki Yoshikawa, Hiroyuki Ishida
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Publication number: 20090097139Abstract: An optical element mounted on a wiring board is sealed by a sealing resin except an optical function region. Wires connecting the wiring board with the optical element are also sealed by the sealing resin. The optical function region is exposed as a bottom surface of a recess whose side surface is formed by the sealing resin. A boundary portion between the side surface of the recess and a top surface portion and a boundary portion between the side surface and bottom surface of the recess have a rounded shape.Type: ApplicationFiled: September 3, 2008Publication date: April 16, 2009Inventors: Masanori Minamio, Hiroyuki Ishida, Noriyuki Yoshikawa