Patents by Inventor Noyan Kinayman

Noyan Kinayman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10826195
    Abstract: Illustrative embodiments significantly improve RF isolation in a packaged integrated circuit by separating the pins/pads associated with multiple RF channels from one another and also from pins/pads associated with digital circuits. Specifically, in certain exemplary embodiments, the integrated circuit is configured with the pins/pad for the digital circuits on a first edge of the chip, the pins/pads for common RF signals on a second edge of the chip opposite the first edge, and the pins/pads for the individual RF channels on third and fourth edges of the chip. The pins/pads associated with each RF channel may include multiple pins/pads (an “RF group”) and may have a central RF pin/pad with a ground pin/pad on each side of the central RF pin/pad. One or more ground pins/pads may be placed between adjacent RF groups on a given edge of the chip.
    Type: Grant
    Filed: March 28, 2018
    Date of Patent: November 3, 2020
    Assignee: ANOKIWAVE, INC.
    Inventors: Kristian N. Madsen, Vipul Jain, Amir Esmaili, Chad Cookinham, Noyan Kinayman, Shamsun Nahar, David W. Corman, Nitin Jain
  • Patent number: 10777888
    Abstract: A beamforming integrated circuit system for use in a phased array has a microchip with RF circuitry, and a plurality of (on chip) interfaces electrically connected with the RF circuitry. The plurality of interfaces includes a signal interface, a first ground interface, and a second ground interface. The signal interface is configured to communicate an RF signal, and both the first and second ground interfaces are adjacent to the signal interface. The system also has a material ring circumscribing the plurality of interfaces, and at least one RF ground path coupled with the material ring.
    Type: Grant
    Filed: October 24, 2017
    Date of Patent: September 15, 2020
    Assignee: ANOKIWAVE, INC.
    Inventors: Vipul Jain, Noyan Kinayman, Robert J. McMorrow, Kristian N. Madsen, Shamsun Nahar, Nitin Jain
  • Patent number: 10587044
    Abstract: A beamforming integrated circuit system for use in a phased array has a microchip with RF circuitry, a bottom surface, and a plurality of interfaces electrically connected with the RF circuitry. The plurality of interfaces includes a plurality of static interfaces and a plurality of RF interfaces. The plurality of static interfaces are on the bottom surface of the microchip and adjacent to each other. The plurality of RF interfaces are also on the bottom surface of the microchip, but radially outward of the plurality of static interfaces. The microchip is configured to be flip chip mounted.
    Type: Grant
    Filed: October 24, 2017
    Date of Patent: March 10, 2020
    Assignee: Anokiwave, Inc.
    Inventors: Vipul Jain, Noyan Kinayman, Robert J. McMorrow, Kristian N. Madsen, Shamsun Nahar, Nitin Jain
  • Publication number: 20180287266
    Abstract: Illustrative embodiments significantly improve RF isolation in a packaged integrated circuit by separating the pins/pads associated with multiple RF channels from one another and also from pins/pads associated with digital circuits. Specifically, in certain exemplary embodiments, the integrated circuit is configured with the pins/pad for the digital circuits on a first edge of the chip, the pins/pads for common RF signals on a second edge of the chip opposite the first edge, and the pins/pads for the individual RF channels on third and fourth edges of the chip. The pins/pads associated with each RF channel may include multiple pins/pads (an “RF group”) and may have a central RF pin/pad with a ground pin/pad on each side of the central RF pin/pad. One or more ground pins/pads may be placed between adjacent RF groups on a given edge of the chip.
    Type: Application
    Filed: March 28, 2018
    Publication date: October 4, 2018
    Inventors: Kristian N. Madsen, Vipul Jain, Amir Esmaili, Chad Cookinham, Noyan Kinayman, Shamsun Nahar, David W. Corman, Nitin Jain
  • Publication number: 20180115356
    Abstract: A beamforming integrated circuit system for use in a phased array has a microchip with RF circuitry, a bottom surface, and a plurality of interfaces electrically connected with the RF circuitry. The plurality of interfaces includes a plurality of static interfaces and a plurality of RF interfaces. The plurality of static interfaces are on the bottom surface of the microchip and adjacent to each other. The plurality of RF interfaces are also on the bottom surface of the microchip, but radially outward of the plurality of static interfaces. The microchip is configured to be flip chip mounted.
    Type: Application
    Filed: October 24, 2017
    Publication date: April 26, 2018
    Inventors: Vipul Jain, Noyan Kinayman, Robert J. McMorrow, Kristian N. Madsen, Shamsun Nahar, Nitin Jain
  • Publication number: 20180115066
    Abstract: A beamforming integrated circuit system for use in a phased array has a microchip with RF circuitry, and a plurality of (on chip) interfaces electrically connected with the RF circuitry. The plurality of interfaces includes a signal interface, a first ground interface, and a second ground interface. The signal interface is configured to communicate an RF signal, and both the first and second ground interfaces are adjacent to the signal interface. The system also has a material ring circumscribing the plurality of interfaces, and at least one RF ground path coupled with the material ring.
    Type: Application
    Filed: October 24, 2017
    Publication date: April 26, 2018
    Inventors: Vipul Jain, Noyan Kinayman, Robert J. McMorrow, Kristian N. Madsen, Shamsun Nahar, Nitin Jain
  • Patent number: 9786633
    Abstract: A semiconductor structure includes a substrate having first and second opposing surfaces and a plurality of electrical connections extending between the first and second surfaces. The semiconductor structure also includes one or more interconnect pads having first and second opposing surfaces and one or more sides. The first surface of each one of the interconnect pads is disposed over or beneath select portions of at least the second surface of the substrate and is electrically coupled to select ones of the plurality of electrical connections. The semiconductor structure additionally includes an isolating layer having first and second opposing surfaces and openings formed in select portions of the isolating layer extending between the second surface of the isolating layer and the second surfaces of the interconnect pads. A corresponding method for fabricating a semiconductor structure is also provided.
    Type: Grant
    Filed: April 23, 2015
    Date of Patent: October 10, 2017
    Assignee: Massachusetts Institute of Technology
    Inventors: Rabindra N. Das, Peter G. Murphy, Karen E. Magoon, Noyan Kinayman, Michael J. Barbieri, Timothy M. Hancock, Mark A. Gouker
  • Publication number: 20170098627
    Abstract: A semiconductor structure includes a substrate having first and second opposing surfaces and a plurality of electrical connections extending between the first and second surfaces. The semiconductor structure also includes one or more interconnect pads having first and second opposing surfaces and one or more sides. The first surface of each one of the interconnect pads is disposed over or beneath select portions of at least the second surface of the substrate and is electrically coupled to select ones of the plurality of electrical connections. The semiconductor structure additionally includes an isolating layer having first and second opposing surfaces and openings formed in select portions of the isolating layer extending between the second surface of the isolating layer and the second surfaces of the interconnect pads. A corresponding method for fabricating a semiconductor structure is also provided.
    Type: Application
    Filed: April 23, 2015
    Publication date: April 6, 2017
    Inventors: Rabindra N. Das, Peter G. Murphy, Karen E. Magoon, Noyan Kinayman, Michael J. Barbieri, Timothy M. Hancock, Mark A. Gouker
  • Patent number: 9455157
    Abstract: A packaged IC has a package with a die paddle, a signal lead, and a ground lead. The packaged IC also has a die, secured to the package, with a ground pad and a signal pad. The signal pad is electrically connected to the signal lead, and the ground pad is electrically connected to both the die paddle and the ground lead.
    Type: Grant
    Filed: September 4, 2015
    Date of Patent: September 27, 2016
    Assignee: Anokiwave, Inc.
    Inventors: Vipul Jain, Noyan Kinayman, Amir Esmaili, Guarav Menon, Nitin Jain
  • Patent number: 6998935
    Abstract: A switch matrix including a plurality of microstrip pairs arranged to form a grid and switches to couple the microstrip pairs where they cross. Each microstrip pair includes a first microstrip and a second microstrip for passing signals. The signals on the first and second microstrips are such that the electromagnetic forces produced by each one are canceled out by the other. By canceling out the electromagnetic forces, undesirable coupling between microstrips that cross and between microstrips and the substrate are minimized, thereby allowing inexpensive substrates such as silicon to be used.
    Type: Grant
    Filed: February 19, 2003
    Date of Patent: February 14, 2006
    Assignee: M/A-Com, Inc.
    Inventors: Nitin Jain, Jean-Pierre Lanteri, Noyan Kinayman
  • Patent number: 6984870
    Abstract: A high-speed cross-point switch is built on a preferably silicon substrate and uses bipolar transistor switching elements. Preferably, the bipolar transistors are SiGe bipolar junction transistors. Intersecting conductive input and output microstrips are preferably thinned at their intersections to reduce shunt capacitance between the coupled lines. It is also preferred that the input buffer be connected in cascode fashion with the switching transistors in order to create an amplification stage. The signal and its inverse are carried on balanced microstrip pairs in order to reduce electromagnetic field strength at the center of the balanced line pairs thereby improving isolation between two crossing balanced pairs.
    Type: Grant
    Filed: October 9, 2003
    Date of Patent: January 10, 2006
    Assignee: M/A-COM, Inc.
    Inventor: Noyan Kinayman
  • Patent number: 6952143
    Abstract: A transition for transmitting a mm-wave signal from one plane to another, the transition comprising: (a) first and second transmission lines on parallel planes; (b) a third transmission line orthogonal to the first and second transmission lines, wherein either the first and second transmission lines are suitable for transmitting a TEM mode signal and the third transmission line is suitable for transmitting a waveguide mode signal, or the third transmission line is suitable for transmitting a TEM mode signal and the first and second transmission lines are suitable for transmitting a waveguide mode signal; and (c) first and second transducers, the first transducer coupled between the first and third transmission lines, the second transducer coupled between the second and third transmission lines, each of the transducers suitable for converting a TEM mode signal to a waveguide mode signal.
    Type: Grant
    Filed: July 25, 2003
    Date of Patent: October 4, 2005
    Assignee: M/A-com, Inc.
    Inventors: Noyan Kinayman, Allan S. Douglas, John F. Cushman
  • Patent number: 6891266
    Abstract: A laminate multilayer ball-grid-array package is suitable for millimeter-wave circuits. The frequency bandwidth of the package is DC to 40 GHz. The package is made using laminate circuit board materials to match the temperature expansion coefficients of the package to the host PCB. Electrical connection between the package and the host PCB on which the package is mounted is achieved using ball-grid-array technology. The package can be sealed, covered, or encapsulated, and is suitable for high-volume production.
    Type: Grant
    Filed: February 14, 2002
    Date of Patent: May 10, 2005
    Assignee: MIA-com
    Inventors: Noyan Kinayman, Bernard A. Ziegner, Richard Anderson, Jean-Pierre Lanteri, M. Tekamul Buber
  • Patent number: 6849879
    Abstract: A method and apparatus are disclosed for reducing crosstalk and dispersion in a crosspoint monolithic microwave integrated circuit (MMIC) switch array operating in a range between DC and microwave frequencies. In accordance with an exemplary embodiment, the crosspoint MMIC switch array includes a dielectric stack, a substrate, a first ground plane, a plurality of thyristor switches, a plurality of signal transmission lines arranged in rows; and a plurality of signal transmission lines arranged in columns. The plurality of signal transmission lines arranged in columns intersect the plurality of signal transmission lines arranged in rows at a plurality of intersection points. Each of the plurality of thyristor switches is associated with one of the plurality of intersection points. Each of the plurality of thyristor switches is in electrical contact with the signal transmission lines that intersect at the associated intersection point.
    Type: Grant
    Filed: October 15, 2002
    Date of Patent: February 1, 2005
    Assignee: Teraburst Networks, Inc.
    Inventors: Ross A. La Rue, Jules D. Levine, Daniel Curcio, Timothy Boles, Joel Goodrich, David Hoag, Noyan Kinayman
  • Publication number: 20050017818
    Abstract: A transition for transmitting a mm-wave signal from one plane to another, the transition comprising: (a) first and second transmission lines on parallel planes; (b) a third transmission line orthogonal to the first and second transmission lines, wherein either the first and second transmission lines are suitable for transmitting a TEM mode signal and the third transmission line is suitable for transmitting a waveguide mode signal, or the third transmission line is suitable for transmitting a TEM mode signal and the first and second transmission lines are suitable for transmitting a waveguide mode signal; and (c) first and second transducers, the first transducer coupled between the first and third transmission lines, the second transducer coupled between the second and third transmission lines, each of the transducers suitable for converting a TEM mode signal to a waveguide mode signal.
    Type: Application
    Filed: July 25, 2003
    Publication date: January 27, 2005
    Applicant: M/A-COM, Inc.
    Inventors: Noyan Kinayman, Allan Douglas, John Cushman
  • Patent number: 6828875
    Abstract: A spatial power divider/combiner that comprises: a housing containing a first channel forming three sides of a rectangular input waveguide and a second channel forming three sides of a rectangular output waveguide; a board coupled to the housing, wherein the underside of the board forms the fourth side of the input and output waveguides; a series of slots etched on the underside of the board located in the input waveguide to divide an input signal; a series of slots etched on the underside of the board located in the output waveguide to recombine the divided signal; and a series of microstrip lines printed on the top side of the board to couple the input waveguide and the output waveguide. Additionally, the divider/combiner can comprise a series of active devices, such as MMIC power amplifier, to provide a spatial power amplifier.
    Type: Grant
    Filed: December 9, 2002
    Date of Patent: December 7, 2004
    Assignee: MIA-Com, Inc.
    Inventors: Eswarappa Channabasappa, Thongchai Hongsmatip, Noyan Kinayman, Richard Alan Anderson, Bernhard A. Ziegner
  • Publication number: 20040160290
    Abstract: A switch matrix including a plurality of microstrip pairs arranged to form a grid and switches to couple the microstrip pairs where they cross. Each microstrip pair includes a first microstrip and a second microstrip for passing signals. The signals on the first and second microstrips are such that the electromagnetic forces produced by each one are canceled out by the other. By canceling out the electromagnetic forces, undesirable coupling between microstrips that cross and between microstrips and the substrate are minimized, thereby allowing inexpensive substrates such as silicon to be used.
    Type: Application
    Filed: February 19, 2003
    Publication date: August 19, 2004
    Inventors: Nitin Jain, Jean-Pierre Lanteri, Noyan Kinayman
  • Publication number: 20040108903
    Abstract: A spatial power divider/combiner that comprises: a housing containing a first channel forming three sides of a rectangular input waveguide and a second channel forming three sides of a rectangular output waveguide; a board coupled to the housing, wherein the underside of the board forms the fourth side of the input and output waveguides; a series of slots etched on the underside of the board located in the input waveguide to divide an input signal; a series of slots etched on the underside of the board located in the output waveguide to recombine the divided signal; and a series of microstrip lines printed on the top side of the board to couple the input waveguide and the output waveguide. Additionally, the divider/combiner can comprise a series of active devices, such as MMIC power amplifier, to provide a spatial power amplifier.
    Type: Application
    Filed: December 9, 2002
    Publication date: June 10, 2004
    Inventors: Eswarappa Channabasappa, Thongchai Hongsmatip, Noyan Kinayman, Richard Alan Anderson, Bernhard A. Ziegner
  • Publication number: 20040077120
    Abstract: A high-speed cross-point switch is built on a preferably silicon substrate and uses bipolar transistor switching elements. Preferably, the bipolar transistors are SiGe bipolar junction transistors. Intersecting conductive input and output microstrips are preferably thinned at their intersections to reduce shunt capacitance between the coupled lines. It is also preferred that the input buffer be connected in cascode fashion with the switching transistors in order to create an amplification stage. The signal and its inverse are carried on balanced microstrip pairs in order to reduce electromagnetic field strength at the center of the balanced line pairs thereby improving isolation between two crossing balanced pairs.
    Type: Application
    Filed: October 9, 2003
    Publication date: April 22, 2004
    Applicant: M/A-COM, Inc.
    Inventor: Noyan Kinayman
  • Patent number: 6646526
    Abstract: A surface-mountable millimeter-wave waveguide filter is constructed using irises in a rectangular waveguide formed in a dielectric material such as glass. The filter structure is surface-mountable, has a single dielectric layer, and can be manufactured using a suitable monolithic microwave integrated circuit (MMIC) process. The filter has potential applications in millimeter-wave systems such as Local Multipoint Distribution System (LMDS) and Autonomous Cruise Control (ACC) radar for automobiles.
    Type: Grant
    Filed: March 14, 2002
    Date of Patent: November 11, 2003
    Assignee: M/A-Com, Inc.
    Inventors: Noyan Kinayman, Eswarappa Channabasappa, Allan Buckle, Nitin Jain