Patents by Inventor Nozomu Takatori

Nozomu Takatori has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9204070
    Abstract: An integrating A/D converter includes: a comparator comparing an input voltage to a reference voltage having a ramp waveform, a voltage value of which linearly varies with time; a higher-order bit counter starting operation or stopping operation triggered by inversion of an output signal of the comparator and outputting higher order bits by performing counting in a cycle of a clock signal; and a time-to-digital converter latching phase information of the clock signal corresponding to plural signals obtained by delaying an output signal of the comparator and decoding the latched values to output lower order bits having higher resolution than the clock cycle.
    Type: Grant
    Filed: April 26, 2011
    Date of Patent: December 1, 2015
    Assignee: Sony Corporation
    Inventors: Tomohiro Takahashi, Hiroki Ui, Junichi Inutsuka, Nozomu Takatori
  • Patent number: 8749674
    Abstract: A solid-state imaging including a comparing circuit, an inverting circuit, and a masking circuit, and that performs column parallel AD conversion processing of analog pixel signals output from a plurality of pixels arranged in a two-dimensional matrix form. The comparing circuit outputs a difference signal obtained by comparing each of the pixel signals outputted from the pixels with a reference signal having a ramp waveform. The inverting circuit inverts a logic of the difference signal outputted from the comparing circuit. The masking circuit masks an output of an output signal of the inverting circuit to a circuit in a subsequent stage during an input offset canceling period in which the comparing circuit cancels an input offset between the pixel signal and the reference signal.
    Type: Grant
    Filed: October 24, 2011
    Date of Patent: June 10, 2014
    Assignee: Sony Corporation
    Inventors: Yuichiro Araki, Takahisa Ueno, Junichi Inutsuka, Nozomu Takatori, Yasuaki Hisamatsu
  • Publication number: 20120038804
    Abstract: A solid-state imaging including a comparing circuit, an inverting circuit, and a masking circuit, and that performs column parallel AD conversion processing of analog pixel signals output from a plurality of pixels arranged in a two-dimensional matrix form. The comparing circuit outputs a difference signal obtained by comparing each of the pixel signals outputted from the pixels with a reference signal having a ramp waveform. The inverting circuit inverts a logic of the difference signal outputted from the comparing circuit. The masking circuit masks an output of an output signal of the inverting circuit to a circuit in a subsequent stage during an input offset canceling period in which the comparing circuit cancels an input offset between the pixel signal and the reference signal.
    Type: Application
    Filed: October 24, 2011
    Publication date: February 16, 2012
    Applicant: SONY CORPORATION
    Inventors: Yuichiro Araki, Takahisa Ueno, Junichi Inutsuka, Nozomu Takatori, Yasuaki Hisamatsu
  • Patent number: 8072518
    Abstract: A solid-state imaging includes a comparing circuit, an inverting circuit, and a masking circuit, and performs column parallel AD conversion processing of analog pixel signals outputted from a plurality of pixels arranged in a two-dimensional matrix form. The comparing circuit outputs a difference signal obtained by comparing each of the pixel signals outputted from the pixels with a reference signal having a ramp waveform. The inverting circuit inverts a logic of the difference signal outputted from the comparing circuit. The masking circuit masks an output of an output signal of the inverting circuit to a circuit in a subsequent stage during an input offset canceling period in which the comparing circuit is canceling an input offset between the pixel signal and the reference signal.
    Type: Grant
    Filed: September 23, 2008
    Date of Patent: December 6, 2011
    Assignee: Sony Corporation
    Inventors: Yuichiro Araki, Takahisa Ueno, Junichi Iutsuka, Nozomu Takatori, Yasuaki Hisamatsu
  • Publication number: 20110292265
    Abstract: An integrating A/D converter includes: a comparator comparing an input voltage to a reference voltage having a ramp waveform, a voltage value of which linearly varies with time; a higher-order bit counter starting operation or stopping operation triggered by inversion of an output signal of the comparator and outputting higher order bits by performing counting in a cycle of a clock signal; and a time-to-digital converter latching phase information of the clock signal corresponding to plural signals obtained by delaying an output signal of the comparator and decoding the latched values to output lower order bits having higher resolution than the clock cycle.
    Type: Application
    Filed: April 26, 2011
    Publication date: December 1, 2011
    Applicant: Sony Corporation
    Inventors: Tomohiro Takahashi, Hiroki Ui, Junichi Inutsuka, Nozomu Takatori
  • Patent number: 8031241
    Abstract: A solid-state imaging device includes a pixel array unit configured by arranging plural unit pixels including charge generating units and output transistors that output processing object signals corresponding to charges generated by the charge generating units, an imaging-condition determining unit that determines whether a large light-amount imaging condition, when an amount of light larger than that of light representing a saturation level is made incident on the charge generating units, is satisfied, and a control unit that performs control, on condition that the imaging-condition determining unit determines that the large light-amount imaging condition is satisfied, to correct an output signal based on processing object signals outputted from the unit pixels such that a harmful effect due to the large light-amount imaging condition is suppressed in the output signal.
    Type: Grant
    Filed: May 6, 2008
    Date of Patent: October 4, 2011
    Assignee: Sony Corporation
    Inventors: Noriya Maeda, Hideo Nakayama, Kenichi Okumura, Nozomu Takatori
  • Publication number: 20090086067
    Abstract: A solid-state imaging includes a comparing circuit, an inverting circuit, and a masking circuit, and performs column parallel AD conversion processing of analog pixel signals outputted from a plurality of pixels arranged in a two-dimensional matrix form. The comparing circuit outputs a difference signal obtained by comparing each of the pixel signals outputted from the pixels with a reference signal having a ramp waveform. The inverting circuit inverts a logic of the difference signal outputted from the comparing circuit. The masking circuit masks an output of an output signal of the inverting circuit to a circuit in a subsequent stage during an input offset canceling period in which the comparing circuit is canceling an input offset between the pixel signal and the reference signal.
    Type: Application
    Filed: September 23, 2008
    Publication date: April 2, 2009
    Applicant: SONY CORPORATION
    Inventors: Yuichiro Araki, Takahisa Ueno, Junichi Inutsuka, Nozomu Takatori, Yasuaki Hisamatsu
  • Publication number: 20090009635
    Abstract: A solid-state imaging device includes a pixel array unit configured by arranging plural unit pixels including charge generating units and output transistors that output processing object signals corresponding to charges generated by the charge generating units, an imaging-condition determining unit that determines whether a large light-amount imaging condition, when an amount of light larger than that of light representing a saturation level is made incident on the charge generating units, is satisfied, and a control unit that performs control, on condition that the imaging-condition determining unit determines that the large light-amount imaging condition is satisfied, to correct an output signal based on processing object signals outputted from the unit pixels such that a harmful effect due to the large light-amount imaging condition is suppressed in the output signal.
    Type: Application
    Filed: May 6, 2008
    Publication date: January 8, 2009
    Applicant: SONY CORPORATION
    Inventors: Noriya Maeda, Hideo Nakayama, Kenichi Okumura, Nozomu Takatori