Patents by Inventor Nurul Amin

Nurul Amin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9441938
    Abstract: Systems and methods for using NFT disc test structures for controlling NFT disc length during manufacture of an HAMR writer are disclosed. An NFT is manufactured concurrently with one or more pairs of pin-disc and disc-less test structures. The NFT disc and pin dimensions may be substantially similar to the pin and disc dimensions of the pin-disc test structure. The disc length of the pin-disc test structure is measured as a function of the difference in resistance between the two test structures and other parameters. Capturing the disc length variation subsequently enables adjustment of the NFT electronic lapping guide stripe height to reduce length variation in the NFT pin.
    Type: Grant
    Filed: December 4, 2013
    Date of Patent: September 13, 2016
    Assignee: Western Digital (Fremont), LLC
    Inventors: Steven C. Rudy, Nurul Amin, Luc Ving Chung, Neil D. Knutson
  • Patent number: 9361916
    Abstract: A slider bar apparatus, and a method for lapping a back side surface of the slider bar, is provided. The slider bar includes a head part and a pair of sliders separated by the head part. Each of the sliders has an air bearing surface (ABS) and a back side surface opposite the ABS. Each of the sliders has a reader element and a writer element of a magnetic head for use in a magnetic hard disk drive. An electrical lapping guide is mounted on the back side surface and has a pair of terminals and a conductive material extending between the terminals. The conductive material is arranged on the slider bar such that the resistance between the terminals increases during a lapping of the back side of the sliders.
    Type: Grant
    Filed: May 27, 2014
    Date of Patent: June 7, 2016
    Assignee: Western Digital (Fremont)
    Inventors: Luc Ving Chung, Steven C. Rudy, Nurul Amin
  • Patent number: 9087537
    Abstract: A system for providing transducer(s) including a disk structure and having an air-bearing surface (ABS) are described. The disk structure resides a distance from the ABS and has a disk dimension substantially perpendicular to the ABS. Lapping control and disk windage ELGs are provided. The lapping control ELG has first and second edges first and second distances from the ABS. The disk windage ELG has edges different distances from the ABS. A difference between these edges corresponds to the disk dimension. A windage resistance of the disk windage ELG is measured and a disk windage determined. The disk windage corresponds to a difference between designed and actual disk dimensions perpendicular to the ABS. A lapping ELG target resistance is determined based on the disk windage. The transducer is lapped. Lapping is terminated based on a resistance of the lapping control ELG and the lapping ELG target resistance.
    Type: Grant
    Filed: May 12, 2014
    Date of Patent: July 21, 2015
    Assignee: Western Digital (Fremont), LLC
    Inventors: Steven C. Rudy, Changqing Shi, Yufeng Hu, Mark D. Moravec, Eric R. McKie, Nurul Amin
  • Patent number: 8772122
    Abstract: Programmable metallization memory cells having an active electrode, an opposing inert electrode and a variable resistive element separating the active electrode from the inert electrode. The variable resistive element includes a plurality of alternating solid electrolyte layers and electrically conductive layers. The electrically conductive layers electrically couple the active electrode to the inert electrode in a programmable metallization memory cell. Methods to form the same are also disclosed.
    Type: Grant
    Filed: July 12, 2013
    Date of Patent: July 8, 2014
    Assignee: Seagate Technology LLC
    Inventors: Nurul Amin, Insik Jin, Wei Tian, Andrew James Wirebaugh, Venugopalan Vaithyanathan, Ming Sun
  • Patent number: 8767456
    Abstract: An apparatus and associated method for a multi-bit memory capable of being selected with a magnetic layer. Various embodiments of the present invention are generally directed to a first selection layer with a low coercivity that is disposed between first and second storage layers that each have a high coercivity. In response to magnetic saturation of the first selection layer, programming of a logical state to the second storage layer is allowed.
    Type: Grant
    Filed: May 16, 2012
    Date of Patent: July 1, 2014
    Assignee: Seagate Technology LLC
    Inventors: Nurul Amin, Johannes Van Ek
  • Patent number: 8758083
    Abstract: A method and system for providing transducer(s) including a disk structure and having an air-bearing surface (ABS) are described. The disk structure resides a distance from the ABS and has a disk dimension substantially perpendicular to the ABS. Lapping control and disk windage ELGs are provided. The lapping control ELG has first and second edges first and second distances from the ABS. The disk windage ELG has edges different distances from the ABS. A difference between these edges corresponds to the disk dimension. A windage resistance of the disk windage ELG is measured and a disk windage determined. The disk windage corresponds to a difference between designed and actual disk dimensions perpendicular to the ABS. A lapping ELG target resistance is determined based on the disk windage. The transducer is lapped. Lapping is terminated based on a resistance of the lapping control ELG and the lapping ELG target resistance.
    Type: Grant
    Filed: September 13, 2010
    Date of Patent: June 24, 2014
    Assignee: Western Digital (Fremont), LLC
    Inventors: Steven C. Rudy, Changqing Shi, Yufeng Hu, Mark D. Moravec, Eric R. McKie, Nurul Amin
  • Publication number: 20130330901
    Abstract: Programmable metallization memory cells having an active electrode, an opposing inert electrode and a variable resistive element separating the active electrode from the inert electrode. The variable resistive element includes a plurality of alternating solid electrolyte layers and electrically conductive layers. The electrically conductive layers electrically couple the active electrode to the inert electrode in a programmable metallization memory cell. Methods to form the same are also disclosed.
    Type: Application
    Filed: July 12, 2013
    Publication date: December 12, 2013
    Inventors: Nurul Amin, Insik Jin, Wei Tian, Andrew James Wirebaugh, Venugopalan Vaithyanathan, Ming Sun
  • Patent number: 8487291
    Abstract: Programmable metallization memory cells having an active electrode, an opposing inert electrode and a variable resistive element separating the active electrode from the inert electrode. The variable resistive element includes a plurality of alternating solid electrolyte layers and electrically conductive layers. The electrically conductive layers electrically couple the active electrode to the inert electrode in a programmable metallization memory cell. Methods to form the same are also disclosed.
    Type: Grant
    Filed: January 30, 2009
    Date of Patent: July 16, 2013
    Assignee: Seagate Technology LLC
    Inventors: Nurul Amin, Insik Jin, Wei Tian, Andrew James Wirebaugh, Venugopalan Vaithyanathan, Ming Sun
  • Patent number: 8446752
    Abstract: An electronic device that includes a first programmable metallization cell (PMC) that includes an active electrode; an inert electrode; and a solid electrolyte layer disposed between the active electrode and the inert electrode; and a second PMC that includes an active electrode; an inert electrode; and a solid electrolyte layer disposed between the active electrode and the inert electrode, wherein the first and second PMCs are electrically connected in anti-parallel.
    Type: Grant
    Filed: July 6, 2009
    Date of Patent: May 21, 2013
    Assignee: Seagate Technology LLC
    Inventors: Ming Sun, Nurul Amin, Insik Jin, Young Pil Kim, Chulmin Jung, Venugopalan Vaithyanathan, Wei Tian, Hai Li
  • Publication number: 20130017413
    Abstract: A method of fabricating a discrete track magnetic recording media. A base layer is provided onto which repeating and alternating magnetic layer and non-magnetic layers are deposited. The thickness of the magnetic layer corresponds to the width of the track of the recording media. A cylindrical rod can be used as the base layer, such that the alternating magnetic and non-magnetic layers spiraling or concentric layers around the rod. The resulting media layer can be cut or sliced into individual magnetic media or used to imprint other media discs with the discrete pattern of the media layer.
    Type: Application
    Filed: September 14, 2012
    Publication date: January 17, 2013
    Applicant: Seagate Technology LLC
    Inventors: Nurul Amin, Sining Mao
  • Publication number: 20130003225
    Abstract: A method of fabricating a recording head includes depositing an insulator material onto at least a portion of a first member, wherein the insulator material forms an insulator film having a film thickness. The method further includes depositing a writer pole material onto the insulator film, wherein the writer pole material forms a writer pole member, and wherein the insulator film is between the writer pole member and a contact layer. Further, in some embodiments, the film thickness determines the distance between the writer pole member and the first contact member and also determines the distance between the writer pole member and the second contact member.
    Type: Application
    Filed: September 12, 2012
    Publication date: January 3, 2013
    Applicant: SEAGATE TECHNOLOGY LLC
    Inventors: Nurul Amin, Ibro Tabakovic, Eric S. Linville, Ming Sun
  • Patent number: 8343801
    Abstract: Programmable metallization memory cells include an electrochemically active electrode and an inert electrode and an ion conductor solid electrolyte material between the electrochemically active electrode and the inert electrode. An electrically insulating oxide layer separates the ion conductor solid electrolyte material from the electrochemically active electrode.
    Type: Grant
    Filed: October 21, 2011
    Date of Patent: January 1, 2013
    Assignee: Seagate Technology LLC
    Inventors: Ming Sun, Michael Xuefei Tang, Insik Jin, Venkatram Venkatasamy, Philip George Pitcher, Nurul Amin
  • Patent number: 8298611
    Abstract: A method of fabricating a discrete track magnetic recording media. A base layer is provided onto which repeating and alternating magnetic layer and non-magnetic layers are deposited. The thickness of the magnetic layer corresponds to the width of the track of the recording media. A cylindrical rod can be used as the base layer, such that the alternating magnetic and non-magnetic layers spiraling or concentric layers around the rod. The resulting media layer can be cut or sliced into individual magnetic media or used to imprint other media discs with the discrete pattern of the media layer.
    Type: Grant
    Filed: July 23, 2008
    Date of Patent: October 30, 2012
    Assignee: Seagate Technology LLC
    Inventors: Nurul Amin, Sining Mao
  • Patent number: 8288753
    Abstract: Programmable metallization memory cells include an electrochemically active electrode and an inert electrode and an ion conductor solid electrolyte material between the electrochemically active electrode and the inert electrode. An electrically insulating oxide layer separates the ion conductor solid electrolyte material from the electrochemically active electrode.
    Type: Grant
    Filed: October 21, 2011
    Date of Patent: October 16, 2012
    Assignee: Seagate Technology LLC
    Inventors: Ming Sun, Michael Xuefei Tang, Insik Jin, Venkatram Venkatasamy, Philip George Pitcher, Nurul Amin
  • Patent number: 8289751
    Abstract: A non-volatile memory cell with a programmable unipolar switching element, and a method of programming the memory element are disclosed. In some embodiments, the memory cell comprises a programmable bipolar resistive sense memory element connected in series with a programmable unipolar resistive sense switching element. The memory element is programmed to a selected resistance state by application of a selected write current in a selected direction through the cell, wherein a first resistance level is programmed by passage of a write current in a first direction and wherein a second resistance level is programmed by passage of a write current in an opposing second direction. The switching element is programmed to a selected resistance level to facilitate access to the selected resistance state of the memory element.
    Type: Grant
    Filed: May 27, 2011
    Date of Patent: October 16, 2012
    Assignee: Seagate Technology LLC
    Inventors: Wei Tian, Nurul Amin, Insik Jin, Ming Sun, Venu Vaithyanathan, YoungPil Kim, Chulmin Jung
  • Patent number: 8286333
    Abstract: A method of fabricating a recording head includes depositing an insulator material onto at least a portion of a first member, wherein the insulator material forms an insulator film having a film thickness. The method further includes depositing a writer pole material onto the insulator film, wherein the writer pole material forms a writer pole member, and wherein the insulator film is between the writer pole member and a contact layer. Further, in some embodiments, the film thickness determines the distance between the writer pole member and the first contact member and also determines the distance between the writer pole member and the second contact member.
    Type: Grant
    Filed: March 19, 2008
    Date of Patent: October 16, 2012
    Assignee: Seagate Technology LLC
    Inventors: Nurul Amin, Ibro Tabakovic, Eric S. Linville, Ming Sun
  • Patent number: 8288749
    Abstract: A switching element that includes a first semiconductor layer, the first semiconductor layer having a first portion and a second portion; a second semiconductor layer, the second semiconductor layer having a first portion and a second portion; an insulating layer disposed between the first semiconductor layer and the second semiconductor layer; a first metal contact in contact with the first portion of the first semiconductor layer forming a first junction and in contact with the first portion of the second semiconductor layer forming a second junction; a second metal contact in contact with the second portion of the first semiconductor layer forming a third junction and in contact with the second portion of the second semiconductor layer forming a fourth junction, wherein the first junction and the fourth junction are Schottky contacts, and the second junction and the third junction are ohmic contacts.
    Type: Grant
    Filed: April 12, 2012
    Date of Patent: October 16, 2012
    Assignee: Seagate Technology LLC
    Inventors: Young Pil Kim, Nurul Amin, Dadi Setiadi, Venugopalan Vaithyanathan, Wei Tian, Insik Jin
  • Publication number: 20120224418
    Abstract: An apparatus and associated method for a multi-bit memory capable of being selected with a magnetic layer. Various embodiments of the present invention are generally directed to a first selection layer with a low coercivity that is disposed between first and second storage layers that each have a high coercivity. In response to magnetic saturation of the first selection layer, programming of a logical state to the second storage layer is allowed.
    Type: Application
    Filed: May 16, 2012
    Publication date: September 6, 2012
    Applicant: SEAGATE TECHNOLOGY LLC
    Inventors: Nurul Amin, Johannes Van Ek
  • Patent number: 8248836
    Abstract: A non-volatile memory cell and method of use thereof. In some embodiments, an individually programmable resistive sense memory (RSM) element is connected in series with a programmable metallization cell (PMC) switching element. In operation, while the switching element is programmed to a first resistive state, no current passes through the RSM element and while a second resistive state is programmed to the RSM element, current passes through the RSM element.
    Type: Grant
    Filed: July 13, 2009
    Date of Patent: August 21, 2012
    Assignee: Seagate Technology LLC
    Inventors: Insik Jin, YoungPil Kim, Ming Sun, Chulmin Jung, Venugopalan Vaithyanathan, Nurul Amin, Wei Tian, Yong Lu
  • Publication number: 20120199936
    Abstract: A switching element that includes a first semiconductor layer, the first semiconductor layer having a first portion and a second portion; a second semiconductor layer, the second semiconductor layer having a first portion and a second portion; an insulating layer disposed between the first semiconductor layer and the second semiconductor layer; a first metal contact in contact with the first portion of the first semiconductor layer forming a first junction and in contact with the first portion of the second semiconductor layer forming a second junction; a second metal contact in contact with the second portion of the first semiconductor layer forming a third junction and in contact with the second portion of the second semiconductor layer forming a fourth junction, wherein the first junction and the fourth junction are Schottky contacts, and the second junction and the third junction are ohmic contacts.
    Type: Application
    Filed: April 12, 2012
    Publication date: August 9, 2012
    Applicant: SEAGATE TECHNOLOGY LLC
    Inventors: Young Pil Kim, Nurul Amin, Dadi Setiadi, Venugopalan Vaithyanathan, Wei Tian, Insik Jin