Patents by Inventor Nusra Lodhi

Nusra Lodhi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Memory device which can function as two separate memories or a single memory
    Patent number: 4995005
    Abstract: A FIFO memory device facilitates transfer of data between a host CPU and a peripheral device in one of a number of modes. In one mode, the FIFO memory device functions as two FIFO memories, one for passing data from the host CPU to the peripheral device, and one for passing data to the host CPU from the peripheral device. In another mode, the FIFO memory device functions as a single FIFO which facilitates passing data from the host CPU to the peripheral device or from the peripheral device to the host CPU. The FIFO incloudes two RAMs addressed by a set of address counters. Of importance, the host CPU can bypass the address counters to directly address each RAM, thereby reading data from or writing data into either RAM regardless of the state of the address counters.
    Type: Grant
    Filed: September 26, 1989
    Date of Patent: February 19, 1991
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Nusra Lodhi
  • Cascading FIFO memory devices for sequential storing
    Patent number: 4962483
    Abstract: A FIFO memory device facilitates transfer of data between a host CPU and a peripheral device in one of a number of modes. In one mode, the FIFO memory device functions as two FIFO memories, one for passing data from the host CPU to the peripheral device, and one for passing data to the host CPU from the peripheral device. In another mode, the FIFO memory device functions as a single FIFO which facilitates passing data from the host CPU to the peripheral device or from to peripheral device to the host CPU. The FIFO includes two RAMs addressed by a set of address counters. Of importance, the host CPU can bypass the address counters to directly address each RAM, thereby reading data from or writing data into either RAM regardless of the state of the address counters.
    Type: Grant
    Filed: June 29, 1989
    Date of Patent: October 9, 1990
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Nusra Lodhi
  • FIFO memory device including circuit for generating flag signals
    Patent number: 4847812
    Abstract: A FIFO memory device facilitates transfer of data between a host CPU and a peripheral device in one of a number of modes. In one mode the FIFO memory device functions as two FIFO memories, one for passing data from the host CPU to the peripheral device, and one for passing data to the host CPU from the peripheral device. In another mode, the FIFO memory device functions as a single FIFO which facilitates passing data from the host CPU to the peripheral device or from the peripheral device to the host CPU. The FIFO includes two RAMs addressed by a set of address counters. Of importance, the host CPU can bypass the address counters to directly address each RAM, thereby reading data from or writing data to either RAM regardless of the state of the address counters. The FIFO also includes a pair of registers for receiving data from the host CPU.
    Type: Grant
    Filed: September 18, 1986
    Date of Patent: July 11, 1989
    Assignee: Advanced Micro Devices
    Inventor: Nusra Lodhi