Abstract: The present application relates to methods for depositing a smooth, germanium rich epitaxial film by introducing silylgermane as a source gas into a reactor at low temperatures. The epitaxial film can be strained and serve as an active layer, or relaxed and serve as a buffer layer. In addition to the silylgermane gas, a diluent is provided to modulate the percentage of germanium in a deposited germanium-containing film by varying the ratio of the silylgermane gas and the diluent. The ratios can be controlled by way of dilution levels in silylgermane storage containers and/or separate flow, and are selected to result in germanium concentration greater than 55 atomic % in deposited epitaxial silicon germanium films. The diluent can include a reducing gas such as hydrogen gas or an inert gas such as nitrogen gas. Reaction chambers are configured to introduce silylgermane and the diluent to deposit the silicon germanium epitaxial films.

Abstract: Methods for low temperature cleaning of a semiconductor surface prior to in-situ deposition have high throughput and consume very little of the thermal budget. GeH4 deposits Ge on the surface and converts any surface oxygen to GeOx. An etchant, such as Cl2 or HCl removes Ge and any GeOx and epitaxial deposition follows. A spike in Ge concentration can be left on the substrate from diffusion into the substrate. All three steps can be conducted sequentially in-situ at temperatures lower than conventional bake steps.

Abstract: The present application relates to methods for depositing a smooth, germanium rich epitaxial film by introducing silylgermane as a source gas into a reactor at low temperatures. The epitaxial film can be strained and serve as an active layer, or relaxed and serve as a buffer layer. In addition to the silylgermane gas, a diluent is provided to modulate the percentage of germanium in a deposited germanium-containing film by varying the ratio of the silylgermane gas and the diluent. The ratios can be controlled by way of dilution levels in silylgermane storage containers and/or separate flow, and are selected to result in germanium concentration greater than 55 atomic % in deposited epitaxial silicon germanium films. The diluent can include a reducing gas such as hydrogen gas or an inert gas such as nitrogen gas. Reaction chambers are configured to introduce silylgermane and the diluent to deposit the silicon germanium epitaxial films.

Abstract: Methods for low temperature cleaning of a semiconductor surface prior to in-situ deposition have high throughput and consume very little of the thermal budget. GeH4 deposits Ge on the surface and converts any surface oxygen to GeOx. An etchant, such as Cl2 or HCl removes Ge and any GeOx and epitaxial deposition follows. A spike in Ge concentration can be left on the substrate from diffusion into the substrate. All three steps can be conducted sequentially in-situ at temperatures lower than conventional bake steps.

Abstract: A semiconductor workpiece including a substrate, a relaxed buffer layer including a graded portion formed on the substrate, and at least one strained transitional layer within the graded portion of the relaxed buffer layer and method of manufacturing the same. The at least one strained transitional layer reduces an amount of workpiece bow due to differential coefficient of thermal expansion (CTE) contraction of the relaxed buffer layer relative to CTE contraction of the substrate.

Abstract: Pile ups of threading dislocations in thick graded buffer layer are reduced by enhancing dislocation gliding. During formation of a graded SiGe buffer layer, deposition of SiGe from a silicon precursor and a germanium precursor is interrupted one or more times with periods in which the flow of the silicon precursor to the substrate is stopped while the flow of the germanium precursor to the substrate is maintained.

Abstract: A semiconductor workpiece including a substrate, a relaxed buffer layer including a graded portion formed on the substrate, and at least one strained transitional layer within the graded portion of the relaxed buffer layer and method of manufacturing the same.

Abstract: A semiconductor workpiece including a substrate, a relaxed buffer layer including a graded portion formed on the substrate, and at least one strained transitional layer within the graded portion of the relaxed buffer layer and method of manufacturing the same.

Abstract: A semiconductor workpiece including a substrate, a relaxed buffer layer including a graded portion formed on the substrate, and at least one strained transitional layer within the graded portion of the relaxed buffer layer and method of manufacturing the same.

Abstract: A method for forming strain-relaxed SiGe films comprises depositing a graded strained SiGe layer on a substrate in which the concentration of Ge is greater at the interface with the substrate than at the top of the layer. The strained SiGe film is subsequently oxidized, producing a strain-relaxed SiGe film with a substantially uniform Ge concentration across the thickness of the film. The relaxed SiGe layer may be used to form a strained silicon layer on a substrate.

Abstract: A method for forming strain-relaxed SiGe films comprises depositing a graded strained SiGe layer on a substrate in which the concentration of Ge is greater at the interface with the substrate than at the top of the layer. The strained SiGe film is subsequently oxidized, producing a strain-relaxed SiGe film with a substantially uniform Ge concentration across the thickness of the film. The relaxed SiGe layer may be used to form a strained silicon layer on a substrate.

Abstract: An enhancement mode semiconductor device has a barrier layer disposed between the gate electrode of the device and the semiconductor substrate underlying the gate electrode. The barrier layer increases the Schottky barrier height of the gate electrode-barrier layer-substrate interface so that the portion of the substrate underlying the gate electrode operates in an enhancement mode. The barrier layer is particularly useful ill compound semiconductor field effect transistors, and preferred materials for the barrier layer include aluminum gallium arsenide and indium gallium arsenide.