Abstract: In some arrangements, a manager of a storage system determines at least one abstracted memory structure for a tenant using a non-volatile memory of at least one non-volatile storage device. The abstracted memory structure includes at least one hardware storage unit of the non-volatile memory of the at least one non-volatile storage device. The at least one abstracted memory structure includes one or more of at least one virtual device corresponding to an application of the tenant or at least one domain corresponding to a volume of the application of the tenant. A virtual device mapping that maps the application of the tenant to the at least one hardware storage unit corresponding to the at least one virtual device is determined. A domain mapping that maps the volume to the at least one hardware storage unit corresponding to the at least one domain is determined.

Abstract: A method of processing a layer in a convolutional neural network includes reading a plurality of different subsets of pairs of input vector values and corresponding weight vector values from an on-chip memory, storing the pair values in registers of a plurality of multiplication units, simultaneously processing the different subsets of pairs of values in the registers by multiplying the pairs of values and accumulating the results of the multiplications to obtain an output vector for a current layer. The input vector and the weight vector have floating point values and multiplying the pairs of values comprises adding corresponding pairs of integers in a log domain, and an input value or weight value is released from the on-chip memory after said input value or weight value is no longer needed for calculating non-computed output vector values.

Abstract: A method of processing a layer in a convolutional neural network includes reading a plurality of different subsets of pairs of input vector values and corresponding weight vector values from an on-chip memory, storing the pair values in registers of a plurality of multiplication units, simultaneously processing the different subsets of pairs of values in the registers by multiplying the pairs of values and accumulating the results of the multiplications to obtain an output vector for a current layer.

Abstract: Systems and methods suitable for assisting data storage on a solid-state mass storage device by furthering interaction between a host and the solid-state mass storage device. The method includes providing data in a target block from a solid-state mass storage device to a host computer system, analyzing the data to identify valid and invalid data of the data in the target block with the host computer system, removing the invalid data, reformatting the valid data into a new data structure with the host computer system, writing the new data structure to the mass storage device, and marking the data in the target block as invalid.

Abstract: An MPEG decoder which distributes the processing load to a plurality of processors and units including an external memory and a bus interface unit, a de-multiplexing data processor, an image data processor, an inverse transform and reconstruction processor, and a prediction calculation unit. A video post-processing unit generates video data, and a serial port unit provides an output for audio data.