Patents by Inventor Oh Sug Kim

Oh Sug Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9786827
    Abstract: A light-emitting diode package includes a package body. The package body includes an upper insulation substrate including upper conductive patterns, a lower insulation substrate including lower conductive patterns, and middle conductive patterns disposed between the upper insulation substrate and the lower insulation substrate. The package body also includes an upper via disposed in the upper insulation substrate, a lower via disposed in the lower insulation substrate, the upper via and the lower via not overlaid with each other.
    Type: Grant
    Filed: September 30, 2016
    Date of Patent: October 10, 2017
    Assignee: Seoul Semiconductor Co., Ltd.
    Inventors: Jung Hwa Jung, Hee Tak Oh, Do Hyung Kim, You Jin Kwon, Oh Sug Kim
  • Publication number: 20170018696
    Abstract: A light-emitting diode package includes a package body. The package body includes an upper insulation substrate including upper conductive patterns, a lower insulation substrate including lower conductive patterns, and middle conductive patterns disposed between the upper insulation substrate and the lower insulation substrate. The package body also includes an upper via disposed in the upper insulation substrate, a lower via disposed in the lower insulation substrate, the upper via and the lower via not overlaid with each other.
    Type: Application
    Filed: September 30, 2016
    Publication date: January 19, 2017
    Inventors: Jung Hwa JUNG, Hee Tak OH, Do Hyung KIM, You Jin KWON, Oh Sug KIM
  • Patent number: 9472743
    Abstract: A light-emitting diode package includes a package body and a light-emitting diode chip disposed on the package body. The package body includes upper conductive patterns disposed on an upper insulation substrate, a lower insulation substrate disposed on lower conductive patterns, and middle conductive patterns disposed between the upper insulation substrate and the lower insulation substrate. The package body also includes upper vias electrically connecting each of the upper conductive patterns to each of the middle conductive patterns, respectively, the upper vias being disposed in the upper insulation substrate, and lower vias electrically connecting each of the middle conductive patterns to each of the lower conductive patterns, respectively, the lower vias disposed in the lower insulation substrate.
    Type: Grant
    Filed: December 30, 2015
    Date of Patent: October 18, 2016
    Assignee: Seoul Semiconductor Co., Ltd.
    Inventors: Jung Hwa Jung, Hee Tak Oh, Do Hyung Kim, You Jin Kwon, Oh Sug Kim
  • Publication number: 20160118563
    Abstract: A light-emitting diode package includes a package body and a light-emitting diode chip disposed on the package body. The package body includes upper conductive patterns disposed on an upper insulation substrate, a lower insulation substrate disposed on lower conductive patterns, and middle conductive patterns disposed between the upper insulation substrate and the lower insulation substrate. The package body also includes upper vias electrically connecting each of the upper conductive patterns to each of the middle conductive patterns, respectively, the upper vias being disposed in the upper insulation substrate, and lower vias electrically connecting each of the middle conductive patterns to each of the lower conductive patterns, respectively, the lower vias disposed in the lower insulation substrate.
    Type: Application
    Filed: December 30, 2015
    Publication date: April 28, 2016
    Inventors: Jung Hwa JUNG, Hee Tak Oh, Do Hyung KIM, You Jin KWON, Oh Sug KIM
  • Patent number: 9257624
    Abstract: A light emitting diode package includes a package body having a cavity, a light emitting diode chip having a plurality of light emitting cells connected in series to one another, a phosphor converting a frequency of light emitted from the light emitting diode chip, and a pair of lead electrodes. The light emitting cells are connected in series between the pair of lead electrodes.
    Type: Grant
    Filed: April 3, 2015
    Date of Patent: February 9, 2016
    Assignee: Seoul Semiconductor Co., Ltd.
    Inventors: Jung Hwa Jung, Hee Tak Oh, Do Hyung Kim, You Jin Kwon, Oh Sug Kim
  • Publication number: 20150214453
    Abstract: A light emitting diode package includes a package body having a cavity, a light emitting diode chip having a plurality of light emitting cells connected in series to one another, a phosphor converting a frequency of light emitted from the light emitting diode chip, and a pair of lead electrodes. The light emitting cells are connected in series between the pair of lead electrodes.
    Type: Application
    Filed: April 3, 2015
    Publication date: July 30, 2015
    Inventors: Jung Hwa JUNG, Hee Tak OH, Do Hyung KIM, You Jin KWON, Oh Sug KIM
  • Publication number: 20150154917
    Abstract: A display device includes a power rectifying unit for rectifying alternating power, a power factor correction unit correcting the power factor of the alternating power and outputting a power factor corrected voltage containing a direct current voltage component having at least a predetermined size, a display module driven by the power factor corrected voltage, a backlight unit, and a driving unit supplying the main driving voltage to a backlight unit, receiving the power factor corrected voltage when the size of the rectified voltage is smaller than a preset threshold value to generate a supplementary driving voltage.
    Type: Application
    Filed: December 21, 2012
    Publication date: June 4, 2015
    Applicant: Seoul Semiconductor Co., Ltd.
    Inventors: Hye Man Jung, Oh Sug Kim, Hyun Gu Kang, II Kyung Suh, Young Eun Yang
  • Patent number: 9048391
    Abstract: A light emitting diode package includes a package body having a cavity, a light emitting diode chip having a plurality of light emitting cells connected in series to one another, a phosphor converting a frequency of light emitted from the light emitting diode chip, and a pair of lead electrodes. The light emitting cells are connected in series between the pair of lead electrodes.
    Type: Grant
    Filed: June 30, 2014
    Date of Patent: June 2, 2015
    Assignee: Seoul Semiconductor Co., Ltd.
    Inventors: Jung Hwa Jung, Hee Tak Oh, Do Hyung Kim, You Jin Kwon, Oh Sug Kim
  • Patent number: 8994061
    Abstract: A light emitting diode package includes a first lead frame comprising a first hole cup, a second lead frame comprising a second hole cup and disposed to face the first lead frame with a gap disposed between the first lead frame and the second lead frame, a first light emitting diode chip disposed on the first hole cup, and a second light emitting diode chip disposed on the second hole cup, the first lead frame comprising a first enlarged region formed between the gap and the first hole cup, and the second lead frame comprising a second enlarged region formed between the gap and the second hole cup.
    Type: Grant
    Filed: March 2, 2012
    Date of Patent: March 31, 2015
    Assignee: Seoul Semiconductor Co., Ltd.
    Inventors: Do Hyoung Kang, Oh Sug Kim
  • Publication number: 20140312380
    Abstract: A light emitting diode package includes a package body having a cavity, a light emitting diode chip having a plurality of light emitting cells connected in series to one another, a phosphor converting a frequency of light emitted from the light emitting diode chip, and a pair of lead electrodes. The light emitting cells are connected in series between the pair of lead electrodes.
    Type: Application
    Filed: June 30, 2014
    Publication date: October 23, 2014
    Inventors: Jung Hwa Jung, Hee Tak Oh, Do Hyung Kim, You Jin Kwon, Oh Sug Kim
  • Patent number: 8796706
    Abstract: Disclosed herein is a light emitting diode package including a package body having a cavity, a light emitting diode chip having a plurality of light emitting cells connected in series to one another, a phosphor converting a frequency of light emitted from the light emitting diode chip, and a pair of lead electrodes. The light emitting cells are connected in series between the pair of lead electrodes.
    Type: Grant
    Filed: June 30, 2010
    Date of Patent: August 5, 2014
    Assignee: Seoul Semiconductor Co., Ltd.
    Inventors: Jung Hwa Jung, Hee Tak Oh, Do Hyung Kim, You Jin Kwon, Oh Sug Kim
  • Publication number: 20120223343
    Abstract: A light emitting diode package includes a first lead frame comprising a first hole cup, a second lead frame comprising a second hole cup and disposed to face the first lead frame with a gap disposed between the first lead frame and the second lead frame, a first light emitting diode chip disposed on the first hole cup, and a second light emitting diode chip disposed on the second hole cup, the first lead frame comprising a first enlarged region formed between the gap and the first hole cup, and the second lead frame comprising a second enlarged region formed between the gap and the second hole cup.
    Type: Application
    Filed: March 2, 2012
    Publication date: September 6, 2012
    Applicant: Seoul Semiconductor Co., Ltd.
    Inventors: Do Hyoung KANG, Oh Sug KIM
  • Publication number: 20120056217
    Abstract: Disclosed herein is a light emitting diode package including a package body having a cavity, a light emitting diode chip having a plurality of light emitting cells connected in series to one another, a phosphor converting a frequency of light emitted from the light emitting diode chip, and a pair of lead electrodes. The light emitting cells are connected in series between the pair of lead electrodes.
    Type: Application
    Filed: June 30, 2010
    Publication date: March 8, 2012
    Applicant: Seoul Semiconductor Co., Ltd.
    Inventors: Jung Hwa Jung, HeeTak Oh, Do Hyung Kim, You Jin Kwon, Oh Sug Kim
  • Patent number: 8129231
    Abstract: A semiconductor package can comprise a die stack attached to a substrate, with bond wires electrically connecting the two. Often multiple die stacks are adhered to a single substrate so that several semiconductor packages can be manufactured at once. A molding compound flow controller is optimally associated with the substrate or semiconductor package at one or more various locations. Flow controllers can control or direct the flow of the molding compound during the encapsulation process. Flow controllers can be sized, shaped, and positioned in order to smooth out the flow of the molding compound, such that the speed of the flow is substantially equivalent over areas of the substrate containing dies and over areas of the substrate without dies. In this manner, defects such as voids in the encapsulation, wire sweeping, and wire shorts can be substantially avoided during encapsulation.
    Type: Grant
    Filed: September 21, 2009
    Date of Patent: March 6, 2012
    Assignee: Stats Chippac, Inc.
    Inventors: Seng Guan Chow, Oh Sug Kim, Byung Tai Do
  • Publication number: 20100009468
    Abstract: A semiconductor package can comprise a die stack attached to a substrate, with bond wires electrically connecting the two. Often multiple die stacks are adhered to a single substrate so that several semiconductor packages can be manufactured at once. A molding compound flow controller is optimally associated with the substrate or semiconductor package at one or more various locations. Flow controllers can control or direct the flow of the molding compound during the encapsulation process. Flow controllers can be sized, shaped, and positioned in order to smooth out the flow of the molding compound, such that the speed of the flow is substantially equivalent over areas of the substrate containing dies and over areas of the substrate without dies. In this manner, defects such as voids in the encapsulation, wire sweeping, and wire shorts can be substantially avoided during encapsulation.
    Type: Application
    Filed: September 21, 2009
    Publication date: January 14, 2010
    Inventors: Seng Guan Chow, Oh Sug Kim, Byung Tai Do
  • Patent number: 7612444
    Abstract: A semiconductor package can comprise a die stack attached to a substrate, with bond wires electrically connecting the two. Often multiple die stacks are adhered to a single substrate so that several semiconductor packages can be manufactured at once. A molding compound flow controller is optimally associated with the substrate or semiconductor package at one or more various locations. Flow controllers can control or direct the flow of the molding compound during the encapsulation process. Flow controllers can be sized, shaped, and positioned in order to smooth out the flow of the molding compound, such that the speed of the flow is substantially equivalent over areas of the substrate containing dies and over areas of the substrate without dies. In this manner, defects such as voids in the encapsulation, wire sweeping, and wire shorts can be substantially avoided during encapsulation.
    Type: Grant
    Filed: January 5, 2007
    Date of Patent: November 3, 2009
    Assignee: Stats Chippac, Inc.
    Inventors: Seng Guan Chow, Oh Sug Kim, Byung Tai Do
  • Publication number: 20080164618
    Abstract: A semiconductor package can comprise a die stack attached to a substrate, with bond wires electrically connecting the two. Often multiple die stacks are adhered to a single substrate so that several semiconductor packages can be manufactured at once. A molding compound flow controller is optimally associated with the substrate or semiconductor package at one or more various locations. Flow controllers can control or direct the flow of the molding compound during the encapsulation process. Flow controllers can be sized, shaped, and positioned in order to smooth out the flow of the molding compound, such that the speed of the flow is substantially equivalent over areas of the substrate containing dies and over areas of the substrate without dies. In this manner, defects such as voids in the encapsulation, wire sweeping, and wire shorts can be substantially avoided during encapsulation.
    Type: Application
    Filed: January 5, 2007
    Publication date: July 10, 2008
    Inventors: Seng Guan Chow, Oh Sug Kim, Byung Tai Do